coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-11-13	mb/*: Update SPD mapping for sandybridge boards	Keith Hui
2023-02-04	mb/*: Replace SNB PCI devices with references from chipset.cb	Arthur Heymans
2022-11-30	nb/intel/sandybridge: Add a chipset devicetree	Arthur Heymans
2021-06-07	bd82x6x boards: Drop redundant `c2_latency`	Angel Pons
2021-05-18	mainboard: Use decimal for `device lapic 0x0 on`	Angel Pons
2021-04-05	sandybridge boards: Drop default `pci_mmio_size`	Angel Pons
2021-01-06	cpu/intel/model_206ax: Rename `cX_acpower` options	Angel Pons
2021-01-06	cpu/intel/model_206ax: Unify ACPI C-state options	Angel Pons
2020-03-03	LGA1155 mainboards: Remove gfx.did and gfx.ndid	Angel Pons
2020-01-05	mb/gigabyte/ga-b75m-d3h/devicetree.cb: Drop zero fields	Angel Pons
2020-01-05	mb/gigabyte/ga-b75m-d3h: Align devicetree lines	Angel Pons
2019-12-26	mb/gigabyte/ga-b75m-d3h: enable superspeed ports for all variants	Bill XIE
2019-07-19	sb/intel/{bd82x6x\|ibexpeak}: Drop p_cnt_throttling_supported	Patrick Rudolph
2019-05-16	mb/gigabyte/ga-b75m-d3{h,v}: Various cleanups	Alex James
2019-01-24	cpu/intel/model_206ax: Remove the notion of sockets	Arthur Heymans
2019-01-23	mb///devicetree.cb: Make sandybridge devicetree uniform	Arthur Heymans
2018-08-10	mb/gigabyte/ga-{h61m-s2pv,b75m-d3h,b75m-d3v}: Clean up mainboard code	Angel Pons
2017-05-09	mb/gigabyte/ga-b75m-d3h: Add tpm support for its onboard tpm socket	Bill XIE
2016-06-12	nb/intel/raminit (native): Read PCI mmio size from devicetree	Patrick Rudolph
2015-07-30	gigabyte/ga-b75m-d3h: Update device tree	Damien Zammit
2015-05-28	intel: Remove pstate_coord_type.	Vladimir Serbinenko
2015-05-28	igd.asl rewrite	Vladimir Serbinenko
2014-12-07	ga-b75m-d3h: Remove duplicate sata_port_map	Vladimir Serbinenko
2014-11-30	gigabyte/ga-b75m-d3h: Add new Intel mainboard	Damien Zammit
2014-11-03	Revert "gigabyte/ga-b75m-d3h: Add new Intel mainboard"	Vladimir Serbinenko
2014-11-02	gigabyte/ga-b75m-d3h: Add new Intel mainboard	Damien Zammit