aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
AgeCommit message (Expand)Author
2020-07-26mb/*/*/devicetree.cb: Normalize disabled PIRQ valuesAngel Pons
2020-05-18mainboard/*/*/*.cb: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-03-18mainboard/[g-p]*: Remove copyright noticesPatrick Georgi
2019-11-12sb/intel/i82801gx: Add common LPC decode codeArthur Heymans
2019-07-20mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode`Nico Huber
2019-06-06sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans
2018-11-12mb/*/*: Harmonise FD and devicetree on boards featuring ICH7Arthur Heymans
2017-10-22superio/ite/common: Add temperature offsetVagiz Trakhanov
2016-12-11nb/intel/i945: Make pci_mmio_size a devicetree parameterArthur Heymans
2016-11-28mb/gigabyte/ga-945gcm-s2l: Configure SuperIO ECArthur Heymans
2016-11-08mb/gigabyte/ga-945gcm-s2l: add mainboardArthur Heymans
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-02 23:42:40 +0000