coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-06-06	sb/intel/i82801gx: Detect if the southbridge supports AHCI	Arthur Heymans
2019-02-28	cpu/intel: Rename socket_mFCPGA478 to socket_m	Nico Huber
2018-11-12	mb//: Harmonise FD and devicetree on boards featuring ICH7	Arthur Heymans
2018-06-04	mb/getac: Get rid of whitespace before tab	Elyes HAOUAS
2016-12-11	nb/intel/i945: Make pci_mmio_size a devicetree parameter	Arthur Heymans
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-08-10	getac/p470: enable GPU devices in devicetree	Patrick Georgi
2015-05-28	igd.asl rewrite	Vladimir Serbinenko
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-11-25	getac/p470: Change COM3/COM4 IRQ to move it out of PCI IRQ ones.	Vladimir Serbinenko
2014-11-04	i82801gx: Handle whole FADT in southbridge.	Vladimir Serbinenko
2013-02-14	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer
2013-02-14	sconfig: rename pci_domain -> domain	Stefan Reinauer
2012-02-17	Remove whitespace.	Patrick Georgi
2011-01-27	Add new ec subdir for Embedded Controllers and common ACPI EC support	Sven Schnelle
2011-01-27	Add a new CMOS variable which triggers activation of the	Patrick Georgi
2010-05-16	Add support for the Getac P470	Stefan Reinauer