| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-12 | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans |
| 2019-06-06 | sb/intel/i82801gx: Detect if the southbridge supports AHCI | Arthur Heymans |
| 2019-01-08 | mb/{d41s,d510mo}: Remove references to PCIe port 5 and 6 | Arthur Heymans |
| 2019-01-03 | mb/foxconn/d41s: Program the subsystemid | Arthur Heymans |
| 2018-11-12 | mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 | Arthur Heymans |
| 2018-08-23 | mb/foxconn/d41s: Add mainboard | Arthur Heymans |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |