| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-10-27 | src: Use 'include <boot/coreboot_tables.h>' when appropriate | Elyes HAOUAS |
| 2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
| 2017-06-12 | mb/emulation/spike-riscv: Update UART address | Jonathan Neuschäfer |
| 2016-11-07 | riscv: Unify SBI call implementations under arch/riscv/ | Jonathan Neuschäfer |
| 2016-06-12 | riscv-spike: Replace custom UART with a memory-mapped 8250 | Jonathan Neuschäfer |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-08-09 | riscv-spike: support for Spike emulation of riscv | Thaminda Edirisooriya |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |