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Change-Id: I78f06b54a6a03d565cf86f1d7bdf37965c3f6ad0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39660
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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They're listed in AUTHORS and often incorrect anyway, for example:
- What's a "Copyright $year-present"?
- Which incarnation of Google (Inc, LLC, ...) is the current
copyright holder?
- People sometimes have their editor auto-add themselves to files even
though they only deleted stuff
- Or they let the editor automatically update the copyright year,
because why not?
- Who is the copyright holder "The coreboot project Authors"?
- Or "Generated Code"?
Sidestep all these issues by simply not putting these notices in
individual files, let's list all copyright holders in AUTHORS instead
and use the git history to deal with the rest.
Change-Id: I57fc98788bb47df16d6aedd0f0701e9991801743
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
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Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.3 with
kernel 4.9. This code is based on the output of autoport.
Working:
- S3 suspend/resume
- USB
- Gigabit Ethernet
- integrated graphics
- PCIe
- SATA
- eSATA
- PS/2 port (only a mouse has been tested)
- hardware monitor
- onboard audio
- front panel audio
- native raminit (2 x 4GB + 2 x 8GB, DDR3-1333)
- native graphics init with libgfxinit
- EHCI debug. The debug port is the port closest to the HDMI port.
- flashrom, using the internal programmer. Tested with coreboot,
untested with the vendor firmware.
- NVRAM settings. Only `gfx_uma_size` and `debug_level` have been
tested with values different from the default.
Untested:
- VGA BIOS for graphics init
- PCIe graphics
- S/PDIF audio
Not working:
- "clear CMOS" button
The CPUTIN sensor on the Super I/O is not connected. The PECI agent is
likely connected instead to give CPU temperature readings. However,
there does not appear to be enough information in the publicly available
datasheets to fully set up the PECI agent. As a result, there is
currently no accurate, automatic fan control via the Super I/O.
Change-Id: I1fc7940bb139623a5a0fde984c023deca9b551f2
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/24971
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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