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This was done using Haswell autoport, with manual fixes to get the
output to build against current main. I do not physically have this
board; I was sent the output of autoport with some fixes on top of
which I added additional changes. The VBT was copied from
/sys/kernel/debug/dri/0/i915_vbt on version 2.70 of the vendor firmware.
The flash chip is 8MiB in a socketed DIP8 package, making it easy to
externally flash to recover from a brick.
Working:
- Haswell MRC.bin
- S3 suspend and resume
- Libgfxinit
- HDMI
- DVI-I (including passive DVI to VGA adapter)
- DisplayPort
- SATA ports
- mSATA SSD
- mPCIe WiFi slot
- Rear USB ports
- USB 3.0 header
- Audio header
- Ethernet
- x16 PCIe slot
- EHCI debug with the CH347 (top USB 2.0 port by the PS/2 connector)
- edk2 (MrChromebox uefipayload_202309)
Not Tested:
- PS/2 keyboard/mouse
- eSATA
- USB 2.0 header
Change-Id: I56c22d8f5505f9a4da25f8b4406b00978af1a586
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81022
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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