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Introduce a sandybridge-style devicetree setting for SPD addresses,
and use it instead of runtime code in mb_get_spd_map() for all
haswell boards without CONFIG(HAVE_SPD_IN_CBFS) - effectively all
boards except google/slippy.
Patch also covers recently added Z97 boards using Broadwell MRC.
Also update util/autoport to match.
abuild passes for all affected boards.
autoport builds, but otherwise untested.
Change-Id: I574aec9cb6a47c8aaf275ae06c7e1fb695534b34
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79025
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Replace `0x411111f0` with `AZALIA_PIN_CFG_NC(0)`, which evaluates to the
same value and conveys additional information to the reader. Done with a
bulk search and replace operation.
Change-Id: Ibd84daec017bc1ab1ee4edd906fda80231c134cc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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This was done using Haswell autoport, with manual fixes to get the
output to build against current main. I do not physically have this
board; I was sent the output of autoport with some fixes on top of
which I added additional changes. The VBT was copied from
/sys/kernel/debug/dri/0/i915_vbt on version 2.70 of the vendor firmware.
The flash chip is 8MiB in a socketed DIP8 package, making it easy to
externally flash to recover from a brick.
Working:
- Haswell MRC.bin
- S3 suspend and resume
- Libgfxinit
- HDMI
- DVI-I (including passive DVI to VGA adapter)
- DisplayPort
- SATA ports
- mSATA SSD
- mPCIe WiFi slot
- Rear USB ports
- USB 3.0 header
- Audio header
- Ethernet
- x16 PCIe slot
- EHCI debug with the CH347 (top USB 2.0 port by the PS/2 connector)
- edk2 (MrChromebox uefipayload_202309)
Not Tested:
- PS/2 keyboard/mouse
- eSATA
- USB 2.0 header
Change-Id: I56c22d8f5505f9a4da25f8b4406b00978af1a586
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81022
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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