coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-08-24	mb/asrock: Drop unneeded empty lines	Elyes HAOUAS
2020-08-04	mb/**/{devicetree,overridetree}.cb: Indent with tabs	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-10	src/mainboard: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-04-04	mainboard/asrock: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
2019-11-12	sb/intel/i82801gx: Add common LPC decode code	Arthur Heymans
2019-06-06	sb/intel/i82801gx: Detect if the southbridge supports AHCI	Arthur Heymans
2019-06-05	mb/*/devicetree.cb: Remove unavailable PCIe ports	Arthur Heymans
2019-01-24	src/mb/asrock/../g41m-s3: Remove spurious devices	Angel Pons
2018-11-12	mb//: Harmonise FD and devicetree on boards featuring ICH7	Arthur Heymans
2018-10-18	src/mainboard: Remove unneeded whitespace	Elyes HAOUAS
2018-09-28	src/mb/asrock/g41c-gs: Add variant g41m-s3	Angel Pons
2018-09-25	mb/asrock/g41m_vs3_r2: Add mainboard	Arthur Heymans
2018-09-18	mb/asrock/g41c-gs: Link separate gpio.c files	Arthur Heymans
2018-09-15	mb/asrock/g41c-gs: Add more buildin PCI devices to the devicetree	Arthur Heymans
2018-07-22	mb/asrock/g41c-gs: Add g41m-gs variant	Arthur Heymans
2018-07-22	mb/asrock/g41c-gs: Add the revision 1 variant	Arthur Heymans