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2017-09-12AGESA CIMX: Remove empty set_pcie_(de)resetKyösti Mälkki
For boards with cimx/sb800, mainboards defined only empty stubs. Reset functionality is handled as BiosCallout. For amd/inagua, the defined function was actually initial GPIO programming. For cimx/sb700, function had prototypes but no callers. For cimx/sb900, everything was commented out already. Change-Id: I936feb4fc41d903078620c919a733bb9f39c3efb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21477 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-12AGESA boards: Clean up some includesKyösti Mälkki
Change-Id: I84c70aa04ab556a3898d3525f7b9aab85812f61d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-23asrock/e350m1: disable unconnected GPP PCIe clocksFelix Held
connections checked by desoldering the FCH and looking at the PCB this lowers the power consumption by about 150-200mW measured on primary side based on change #5397 Change-Id: I986c4cc73a247994f2a47fdfd03f585069ca9385 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/11866 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2013-04-01ASRock E350M1: mainboard.c: Include `cimx_util.h` for `pm_iowrite`Paul Menzel
When building the ASRock E350M1, the following warning is shown. $ make # on Jenkins (build server) […] CC mainboard/asrock/e350m1/mainboard.ramstage.o src/mainboard/asrock/e350m1/mainboard.c: In function 'mainboard_enable': src/mainboard/asrock/e350m1/mainboard.c:63:2: warning: implicit declaration of function 'pm_iowrite' [-Wimplicit-function-declaration] […] This warning was introduced by moving the initialization of the ASF registers using `pm_iowrite` to `mainboard.c` in commit db6c5bfd8bdef4489e7fec533cb2ca8ae6c24cf3 Author: Jens Rottmann <JRottmann@LiPPERTembedded.de> Date: Thu Mar 21 22:21:28 2013 +0100 Asrock E350M1: Use SPD read code from F14 wrapper Reviewed-on: http://review.coreboot.org/2875 and is fixed by including `southbridge/amd/cimx/cimx_util.h` declaring `pm_iowrite`. Note, that the other AMD SB800 based boards seem to use the header file `southbridge/amd/sb800/sb800.h`, so no warning is shown for those. But since the CIMx SB800 code is used, the routines from the CIMx directory are more appropriate to declare these functions. So delete the commented out include line for this header too. Change-Id: I179aad5157c5a91294339a3e7b6c4c1715c6f099 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2957 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-22Asrock E350M1: Use SPD read code from F14 wrapperJens Rottmann
Changes: - Get rid of the E350M1 mainboard specific code and use the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: I08c2aebc62facc14f94400ee1ad188901ba73f19 Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de> Reviewed-on: http://review.coreboot.org/2875 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2013-03-06ASRock E350M1: mainboard.c: Add declarations for `set_pcie_{,de}reset`Paul Menzel
Since the merg of the ASRock E350M1 port (a649a96e) the compiler warns about the following [1]. mainboard.c:35, GNU Compiler 4 (gcc), Priorität: Normal no previous prototype for 'set_pcie_reset' [-Wmissing-prototypes] mainboard.c:43, GNU Compiler 4 (gcc), Priorität: Normal no previous prototype for 'set_pcie_dereset' [-Wmissing-prototypes] Adding the function prototypes to the beginning of the file as done in commit »Persimmon updates for AMD F14 rev C0« (d7a696d0) addresses the warning. [1] http://qa.coreboot.org/job/coreboot-gerrit/4975/warnings13Result/package.-139448264/file.-1544928473/ [2] http://review.coreboot.org/137 Change-Id: Iad2e62ec37c3a2f749a264974b61ac7c226e9b83 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2590 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
In the file `COPYING` in the coreboot repository and upstream [1] just one space is used. The following command was used to convert all files. $ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/' [1] http://www.gnu.org/licenses/gpl-2.0.txt Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2490 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-02-26AMD Fam14 boards: reduce unnecessary differences, 2nd attemptJens Rottmann
This patch reduces unnecessary differences between AMD Inagua, Persimmon, Union Station, South Station and Asrock E350M1. It's only cosmetical, but makes them a little bit easier to compare. This is the remainder of the original http://review.coreboot.org/2464, parts of which somehow got lost in a flurry of refactoring and splitting patches. Change-Id: I034228be9edaaa4122506763d7bb4158f8e0ec53 Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de> Reviewed-on: http://review.coreboot.org/2529 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2013-02-25mainboard.c: Name enable_dev function uniformly `mainboard_enable`Paul Menzel
To reduce the differences between these file name the enabling device function in the directory `src/mainboard` uniformly `mainboard_enable` [1]. Thanks to the awesome help of gnomon and BlastHardcheese in the IRC channel #sed on <irc.freenode.net>. gnomon came up with the following command to do the actual work. $ cd src/mainboard $ for f in */*/mainboard.c ; \ > do src="$(awk '/\.enable_dev = /{v=$NF; sub(/,$/,"",v); print v}' "$f")" ; \ > [[ -z $src ]] && continue ; \ > printf '%s\n' "g/${src}/s/${src}\([,(]\)/mainboard_enable\1/p" w | ed -s "$f" ; \ > done `src/mainboard/digitallogic/msm586seg/mainboard.c` and `src/mainboard/technologic/ts5300/mainboard.c` had to be adapted manually as no comma was used separating the struct members. And with the following statement, gnomon is even more likable! My pleasure entirely. Good luck with coreboot; I'm a big fan of the project. [1] http://www.coreboot.org/pipermail/coreboot/2013-February/074548.html Change-Id: Ife9cd0c2d9cc1ed14afc6d40063450553f06a6c6 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2493 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-06Drop redundant CHIP_NAME in mainboard.cKyösti Mälkki
Compose the name from Kconfig strings instead. As the field is for debug print use only, a minor change in the output should do no harm. The strings no longer include word "Mainboard". Change-Id: Ifd24f408271eb5a5d1a08a317512ef00cb537ee2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1635 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
The includes removed here were previously required for struct lb_memory and lb_add_memory_range(). Change-Id: Ie6c0d4ef55c2225aa709cf3fbad30ff1080e3610 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1391 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2012-08-08Drop HAVE_MAINBOARD_RESOURCESKyösti Mälkki
These existed to provide a hook to add reserved memory regions in the coreboot memory table. Reserved memory are now added as resources. Change-Id: I9f83df33845cfa6973b018a51cf9444dbf0f8667 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1414 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-08-02AMD and GFXUMA: move setup_uma_memory() to northbridgeKyösti Mälkki
UMA region can be determined at any time after the amount of RAM is known and before the uma_resource() call. Change-Id: I2a0bf2d3cad55ee70e889c88846f962b7faa0c7e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1379 Reviewed-by: Zheng Bao <zheng.bao@amd.com> Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-07-26Drop mainboard chip.hStefan Reinauer
mainboard_config never worked right, at least not since we've had sconfig. Hence, drop mainboard/<vendor>/<device>/chip.h and fix up the mainboards that tried to use it anyways. Change-Id: I7cd403ea188d8a9fd4c1ad15479fa88e02ab8e83 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1359 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-23AMD and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
Use of uma_resource() in AMD northbridge code created a memory resource marked as reserved. Such resources are removed from system memory in write_coreboot_table(). Change-Id: Ib5e49e851d6622d8ece9d6d612e245b3962b9167 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1233 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2012-07-16Move setup_uma_memory() to Agesa Family14 northbridgeKyösti Mälkki
Following boards had identical code: amd/inagua amd/persimmon The following had only whitespace or debug level changes compared to ones above. amd/union_station amd/south_station asrock/e350m1 Change-Id: I11ee46e06e1dd510cba551166189ebcaa144464b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1208 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-07-16Define global uma_memory variablesKyösti Mälkki
Use of the uma_memory_base and _size variables is very scattered. Implementation of setup_uma_memory() will appear in each northbridge. It should be possible to do this setup entirely in northbridge code and get rid of the globals in a follow-up. Change-Id: I07ccd98c55a6bcaa8294ad9704b88d7afb341456 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1204 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-08Clean up #ifsPatrick Georgi
Replace #if CONFIG_FOO==1 with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1[[:space:]]*\$,#if \1," {} + Replace #if (CONFIG_FOO==1) with #if CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*1)[[:space:]]*\$,#if \1," {} + Replace #if CONFIG_FOO==0 with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0[[:space:]]*\$,#if \!\1," {} + Replace #if (CONFIG_FOO==0) with #if !CONFIG_FOO: find src -name \*.[ch] -exec sed -i "s,#if[[:space:]]*(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]*0)[[:space:]]*\$,#if \!\1," {} + (and some manual changes to fix false positives) Change-Id: Iac6ca7605a5f99885258cf1a9a2473a92de27c42 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1004 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Martin Roth <martin@se-eng.com>
2011-02-26Add support for the ASRock E350M1, an AMD family 14h Fusion board.Scott Duplichan
A video option rom must be added for UMA graphics support. It can be extracted from the supplied UEFI BIOS. ASRock E350M1 support is based on the AMD persimmon project. The major differences are SIO model and DIMM SDP addressing. With this coreboot and seabios, the board can boot DOS from a SATA drive and can boot WinPE from a USB flash drive. I was unable to get Windows setup to run. The board has a socketed SPI flash BIOS chip and a serial port header. The SIO is Nuvoton NCT5572D. Using coreboot's existing Winbond w83627hf is a good enough match to get the serial port and keyboard working. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-24git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6376 ↵Scott Duplichan
2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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