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path: root/src/mainboard/amd
AgeCommit message (Collapse)Author
2006-10-24Change all occurences of NSC to nsc in the code. The next commitUwe Hermann
will then rename the src/superio/NSC directory to src/superio/nsc. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-05K8_4RANK to QRANKYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04add missed asl for ht chainYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2441 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support inYinghai Lu
serengeti_cheeatah git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04AMD Rev F supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-09-14additions and mods for lzma. Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger Signed-off-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19closing issue 44: rename ram clocks in cmos.layoutStefan Reinauer
https://openbios.org/roundup/linuxbios/issue44 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-18cleanup some of the compressed rom stream ugliness -- more to do!Ronald G. Minnich
olpc and rumba can now boot linux out of flash. vsa was resized to 64K. olpc and rumba now used compressed payload -- thanks stefan! git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-04don't wait core0 started twiceYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-03more changes; rumba enet works fine now.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02Fall back to pre-broken settings and setup for GX2. Ronald G. Minnich
We lost a few things, but this is still worth it. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-27we don't need msr_initRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-26some todo and comment for ron.Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-25set irq options.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20change to 5536Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-20boot to kernelLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-19resolve conflictLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-13add SystemPreInit() and supportRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10add cpureginit to romcc code.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06more fix for vsm, not working yetLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03did I commit the last change?Li-Ta Lo
try to fix 0x10000026 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03comment out reset in MB ConfigYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03new cache_as_ram support Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-17resolving conflict with Ron's workLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14for different pll values.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14Make the pll stuff parameterized.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-14Fix for nehemiahRonald G. Minnich
other fixes for gx2 ram init. support for sharplfg00l04 -- not working yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13added early_setup.cLi-Ta Lo
removed some messages git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13failed attempt to do early init for cs5535. Almost there butLi-Ta Lo
still get garbage reading smbus. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-02I am so stupid to mix up logical and bitwise NOT.Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-01a few new items and mods for ollieRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2189 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-28remove more unused codeLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-28remove unused GX1 asm codeLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-28semi working with random 1 bit errorLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-27more GX2 commitLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-06make doxygen workRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-27adding preliminary, and almost certainly wrong, rumba support. Ronald G. Minnich
This is just a skeleton, basically, and will most likely not even compile yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-06use hcdn to simplify the mptable.c and irqtable.c --- patch fro issueYinghai Lu
48 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-041203_hcdn.diff: Stefan Reinauer
store every HT device unit id base and pass those info to acpi https://openbios.org/roundup/linuxbios/issue46 Note: This version drops the two scripts a and c and creates the dsdt on the fly from Config.lb using makerule git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02issue 41 - fix up mainboard compilation.Stefan Reinauer
new serengeti_leopard specific code git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02issue 41 - fix up motherboard compilation. There's always hope.Stefan Reinauer
1201_ht_bus0_dev0_fidvid_mb.diff part 1 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-24adding support for serengeti leopardRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-13 "lnxi-patch-13".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-12 "lnxi-patch-12".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08eric patchYinghai Lu
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> write_pirq_routing_table for x86 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-24arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> AMD MB IDE enable in Config.lb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-19more universal acpi codeStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-10nodeidYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-17non coherent ht chain setup automaticallyYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Ensure every copy of Options.lb uses:Eric Biederman
CROSS_COMPILE CC HOSTCC OBJCOPY git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Modify all of the Opteron motherboards to have a separate logicalEric Biederman
chip for the amdk8/root_complex git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-03*** empty log message ***Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-31fix soloStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1729 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21adapt config filesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21get solo building after last infrastructure changesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21update failover handling of some amd64 boardsStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21- Bump the LinuxBIOS major versionEric Biederman
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-20Tyan update to work with new CPU ConfigYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19- add support for socket 754Stefan Reinauer
- fix configuration creation for amd solo (doesn't compile yet) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- First stab at running linuxbios without the old static device tree.Eric Biederman
Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08move default_resource_map to its own fileLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15add support for AMD Serenade mainboard, why we have phantom devices here?Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-15add support for AMD Serenade mainboard, why we have phantom devices here?Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-30put extern keyword in front of declaration, make the compiler do it jobLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-28indentStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-24indent files to reduce the noise in further diffs.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-25make log message a little prettierLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1479 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-25remove traces of coherent_ht_mainboardStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-24drop obsolete CONNECTION_x_y macros. Use row information instead.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-24Further trimming freebios2 towards code reuse.Stefan Reinauer
Unified AMD K8 reset function that can be customized via mainboard Config.lb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-24small step to clean up mainboard directories. debug.c was basically identicalStefan Reinauer
on all amd64 motherboards, so it moved to the amdk8 specific code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-191.1.6 adaptionsStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-19more compile fixes.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1444 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-19compile fixStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11- Moved hlt() to it's own header.Eric Biederman
- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-09go verbose for now!Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-21adapt irq values to pirq tableStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-21update mp table and pirq tableStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-02fix quartet and S4880 spd initialization.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-27updateStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-19faking spd setup for now on quartet ;)Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-06Make solo build again.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-06fix build for quartet.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1261 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-04fix stupid stepan's bugsStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-04infrastructure updatesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-04make quartet compile.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-27merge minor solo changesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-24merge latest quartet changesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-15more solo fixes...Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14- Minor bugfixesEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13move equal with hdama code.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-13get solo target building with 1.1.5 sourcesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 - O2, enums, and switch statements work in romccEric Biederman
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-06add smbus_write_byte() function. currently fails in romcc :(Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-01some quartet memory init updates.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-30remove references to static_devices.oStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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