coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2011-05-15	Enable SPI cacheline prefetch early to reduce boot time.	Scott Duplichan
2011-05-15	Enable SPI cacheline prefetch early to reduce boot time.	Scott Duplichan
2011-05-15	Switch processor cores to pstate 0 early to reduce boot time.	Scott Duplichan
2011-05-15	Enable 33 MHz fast mode SPI read early to reduce boot time.	Scott Duplichan
2011-05-15	Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.	Scott Duplichan
2011-05-15	Match DIMM SPD addressing to implemented slots.	Scott Duplichan
2011-05-15	Size mmconf according to CONFIG_MMCONF_BUS_NUMBER.	Scott Duplichan
2011-05-15	1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support.	Scott Duplichan
2011-05-15	1) Set I/O APIC ID according to BKDG recommendation	Scott Duplichan
2011-04-20	run uart_init() from console_init, just like the other console initialization...	Stefan Reinauer
2011-03-01	Use subsystem id from devicetree.cb instead of Kconfig and move	Sven Schnelle
2011-02-14	Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8.	Frank Vibrans