coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2014-06-14	mainboard/amd: De-ASCIIartify reference boards	Edward O'Callaghan
2014-05-05	AGESA: Implement EmptyHeap()	Kyösti Mälkki
2014-05-05	AGESA fam15tn: Use common GetHeapBase()	Kyösti Mälkki
2014-01-15	Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR	Kyösti Mälkki
2013-11-22	AMD f15tn, f16kb: Remove CDIT table and DMI table	WANG Siyuan
2013-11-12	AMD Hudson: Move function s3_resume_init_data to southbridge	Zheng Bao
2013-06-17	Add support for XHCI (USB 3.0)	Dave Frodin
2013-05-01	AMD Hudson A55E: Remove GEC firmware blob kconfig prompt	Bruce Griffith
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2013-01-21	Hudson: Cleanup - change SB800 references to hudson	Martin Roth
2013-01-16	Fix high dword of MTRR mask set with CONFIG_CPU_ADDR_BITS	Martin Roth
2013-01-11	AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITS	Zheng Bao
2012-11-20	Unify use of bool config variables	Stefan Reinauer
2012-07-26	Add correct bios callout into read event routine	zbao
2012-07-25	AMD Family15tn: Set the mask of MTRR to 0000FFFXX0000800	zbao
2012-07-22	Mainboard Parmer based on Trinity	zbao