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2020-04-04mainboard/amd: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: Iaabbc58a7089b28ebe23df3a04464234ff465486 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40063 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-03-25acpi: correct the processor devices scopeMichał Żygowski
The ACPI Spec 2.0 states, that Processor declarations should be made within the ACPI namespace \_SB and not \_PR anymore. \_PR is deprecated and is removed here. Additionally add processor scope patching for P-State SSDT created by AGESA, becasue AGESA creates the tables with processors in \_PR scope. TEST=boot Debian Linux on PC Engines apu2, check dmesg that there are no errors, decompile ACPI tables with acpica to check whether the processor scope is correct and if IASL does not complain on wrong checksum, run FWTS Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I35f112e9f9f15f06ddb83b4192f082f9e51a969c Reviewed-on: https://review.coreboot.org/c/coreboot/+/39698 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-18mainboard/[a-f]*: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I57fc98788bb47df16d6aedd0f0701e9991801743 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2020-02-24mb/amd: Fix typosElyes HAOUAS
Change-Id: I9abc0837b72b13e7614ecffa5b21c3d4bf41d0f8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39080 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-01-10src: Remove blank acpi_tables source filesKarthikeyan Ramasubramanian
Due to build rules, dummy acpi_tables source files were added in many mainboards. With commit 1e83e5c61a3aa98f58f7d8cbf8d1eb9532896cc3 ("src/arch/x86: Build mainboard acpi_tables source if present"), the build system will build mainboard acpi_tables only if present. Remove the dummy/empty/blank acpi_tables source files. BUG=None TEST=Build test with some google mainboards. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I0cef34368e2e5f5e3b946b22658ca10c7caad90a Reviewed-on: https://review.coreboot.org/c/coreboot/+/37854 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-01-09AGESA,binaryPI boards: Declare some IRQ tables staticKyösti Mälkki
Change-Id: Ib45c6372df6068ab041a055dad8bacf597717ba2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2019-12-20src/mainboard: Remove unused '#include <device/pci.h>'Elyes HAOUAS
Change-Id: I5791fddec8b2387df5979adbb1a0fa64c5dd23ea Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37522 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-12-19src/mainboard/amd: Remove unused <stdlib.h>Elyes HAOUAS
Change-Id: I61982309a4110f4f40193190e91224e909b575a9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33888 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-12AGESA, binaryPI: Remove generic device for SPD eepromsKyösti Mälkki
These entries have no functional purpose, followup work will disallow chip entries that do not link in the respective driver. Change-Id: Ieab695022d0dd2f2671f9058db97bdd6fb29a10d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-12-11mb/amd/padmelon: Use Prairie Falcon configurationRichard Spiegel
While Merlin Falcon binaries are not available, make it explicit that it's compiling for Prairie Falcon (it was being surreptitious about it). Board Padmelon accepts 3 different SOC, just changing some resistors (soldered or not): Brown Falcon, Prairie Falcon and Merlin Falcon. Code for Brown Falcon is not currently available. BUG=None TEST=Build with prairie falcon. Change-Id: I1663e4403a32a7d626dd2fa06763f18f4230457e Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2019-12-11soc/amd/stoneyridge|mbs: Deprecate SOC_AMD_NAME_PKG and othersMarshall Dawson
Add package and APU selections to mainboards and remove symbols no longer used in soc//stoneyridge. Change-Id: I60214b6557bef50358f9ec8f9fcdb7265e04663b Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37225 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2019-12-11soc/amd/stoneyridge|mbs: Define SOC_AMD_STONEYRIDGE symbolMarshall Dawson
Make a new Kconfig symbol for using soc//stoneyridge. This code also supports Prairie Falcon is backward-compatible with Carrizo and Merlin Falcon. Although Bettong uses Carrizo, it does not currently rely on stoneyridge source, so it is unaffected by this change. Change-Id: I786ca54b0444cbcf36dc428a193006797b01fc09 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2019-12-11soc/amd/stoneyridge|mb: Add Kconfig symbol for Prairie FalconMarshall Dawson
The stoneyridge code inferred that if Merlin Falcon was built but no Merlin Falcon binaries were present, the intent must be Prairie Falcon. The two falcons are Embedded variants, and Prairie Falcon falls within Family 15h Models 70h-7Fh. Add a Prairie Falcon symbol that can be used explicitely. Drop HAVE_MERLINFALCON_BINARIES. Change-Id: I0d3a1bc302760c18c8fe3d57c955e2bb3bd8153a Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2019-11-23Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi
Kconfig became stricter on what it accepts, so accomodate before updating to a new release. Change-Id: I92a9e9bf0d557a7532ba533cd7776c48f2488f91 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37156 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-09-04mainboard/amd: Add padmelon board codeRichard Spiegel
Padmelon board code was written for Merlin Falcon (family 15h models 60h-6fh), but as the needed binaries are not yet merged (commit 33615), a config HAVE_MERLINFALCON_BINARIES was added. If the binaries are not available, the board defaults to Prairie Falcon, which use the same binaries as Stoney Ridge. Once the binaries are merged, the config will be eliminated. Fan control is done through F81803A SIO, and IRQ/GPIO and other board characteristics are the same regardless of Merlin Falcon or Prairie Falcon. Padmelon board was created to accept Prairie Falcon, Brown Falcon and Merlin Falcon. The requested development was for Merlin Falcon. There are some small spec changes (such as number of memory channels) between SOCs. Brown Falcon was not investigated, Prairie Falcon is very similar to Stoney Ridge. Started from Gardenia code, added changes created by Marc Jones and finally revised against schematic, which added changes to GPIO settings. BUG=none. TEST=Both versions tested and boot to Linux using SeaBIOS. Change-Id: I5a366ddeb4cfebd177a8744f6edb87aecd4787dd Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33993 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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