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path: root/src/mainboard/amd/olivehill/mptable.c
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2018-05-09mb/amd: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I01270248bddf07df4c959f0c632e722728d0cd03 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-09-19AGESA binaryPI: Clean up amdfamXX.h includeKyösti Mälkki
Change-Id: Iba8b8d33e1f10e28745234988d97d4fafd04c798 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21583 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2016-09-26mainboard/*/*/mptable.c: Improve code formattingElyes HAOUAS
Change-Id: I341293cd334d6d465636db7e81400230d61bc693 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16723 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-06-03AMD boards: Drop comment on include fileKyösti Mälkki
The included file does not declare pm_ioread(), and the modified file does not call it either. Change-Id: I9723caf1062db23b4a3648e07c2dc4c02f862619 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14968 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
2014-07-28AGESA f14 f15tn 16kb: Move IOAPIC ID setup out of get_bus_conf()Kyösti Mälkki
Change-Id: I7fd14c17242cd3deb7a784fc918ad6fe1191bd13 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6359 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28AGESA boards: Use devicetree for PCI bus enumerationKyösti Mälkki
Previously MP table contained PCI_INT entries for PCI bus behind bridge 0:14.4 even if said PCI bridge function was disabled. Remove these as invalid, indeterminate bus number could cause conflicts. PCI_INT entries with bus_sb800[2], bus_hudson[2] and bus_yangtze[2] were invalid as there is no PCI bridge hardware on device 0:14.0. Remove these as invalid, indeterminate bus number could cause conflicts. Change-Id: Ie6a3807f64c8651cf9f732612e1aa7f376a3134f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6358 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-24AGESA: Drop unused extern declarationsKyösti Mälkki
Change-Id: I7f681b40251f49ff717589ed5e7d7e00ee36c7c1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6332 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-17AMD get_bus_conf(): Drop bus_type arrayKyösti Mälkki
Only ever used as lvalue, so no point creating the array. Change-Id: I6699dfae9377a895e9bc4a52579d00ddcfa60a9f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6277 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-07-03AGESA: Call get_bus_conf() just onceKyösti Mälkki
Instead of calling get_bus_conf() three times from write_tables() and executing it once, just make one call before entering write_tables(). Change-Id: I818e37128cb0fb5eaded3c1e00b6b146c1267647 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6133 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-04-17AMD hudson yangtze: Drop MAX_PHYSICAL_CPUS in commentsKyösti Mälkki
Change-Id: I81de291da7b3db8d04a127d5a304b558f1c75b34 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5535 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-16southbridge/hudson: Use MMIO instead of PIO to access PM spaceAlexandru Gagniuc
The MMIO region is set up by AGESA very early on, so we can use it to access the PM register space in ramstage. 16-bit accessors are also provided to simplify some setup tasks. 16-bit accesses are not possible via PIO. The pm2_iowrite/read accessors are removed, as they are not used. Change-Id: Ie7967b5086eb004525c39721338c6495aedc8165 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5503 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2013-11-24amd/olivehill: Fix the double spaces in copyright headerZheng Bao
Change-Id: I1bdc52efc827c331c53b97d2b96edafc518d05bf Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/4259 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-10-07AMD hudson yangtze: Fix corruption of a global ramstage variableKyösti Mälkki
A late for loop may reference over the current array allocation and corrupt an unrelated global variable. As a quick fix bumb the size of the array allocation uniformly to 6. We missed these boards for commit 9c7d73ca because the arrays had been renamed. Change-Id: Iff2f2a0090d9302576bc72195d2a3f6fa37ce29a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3954 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2013-08-06AMD Olive Hill: Change SB800 references to YangtzeBruce Griffith
Change-Id: I7f6f6ff444fda4bdf233db1383919772afe6b635 Reviewed-by: Marc Jones <marc.jones@se-eng.com> Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/3815 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin@se-eng.com>
2013-08-05AMD Olive Hill: Add new AMD mainboard using Kabini processorSiyuan Wang
Change-Id: I1f252b67c039d28df96e8dfd458a1ca6a7dbc816 Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com> Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com> Reviewed-by: Bruce Griffith <bruce.griffith@se-eng.com> Tested-by: Bruce Griffith <bruce.griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/3784 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com>
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