coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2021-03-11	mb/amd/majolica: Enable USB ACPI in devicetree	Mathew King
	BUG=b:180529005 TEST=boot majolica, all USB ports work Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I6d3506bb4d54c7f8ea1e53576ef68d2aface6c89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51256 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-03	mb/amd/majolica: Add eSPI support	Zheng Bao
	Change-Id: I3e82a51173f561df560c36528a9b7ec26cf489b5 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-03-02	mb/amd/majolica: Enable required devices in devicetree	Mathew King
	Most devices are now disabled by default in the chipset. Enable the iGPU and two XHCI controllers that are required to boot the board. BUG=b:180528708 TEST=To be tested Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I54a4547217fb8e9f67fc0c8e1e36e96dfaae331c Reviewed-on: https://review.coreboot.org/c/coreboot/+/51095 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-14	soc/amd/cezanne: move CPU cluster to chipset device tree	Felix Held
	This will be common for all boards, so move it to the chipset device tree. TEST=CPU cluster and LAPIC still show up in console logs. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia49e7b4cfc09c60b6152b8ccc47f37b6adc1e319 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50613 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-12	mb/amd/majolica/devicetree: add CPU cluster	Felix Held
	Change-Id: I8d8b7f3ea2502e4e49a1290b07d84d5bbb2924a7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50506 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-05	mb/amd/majolica: add skeleton of Cezanne reference board	Felix Held
	This is an adapted copy of mainboard/example/min86 that is currently only used for Jenkins to test the SoC code in soc/amd/cezanne and isn't expected to reach boot block at the moment. It will be extended in future follow-up commits. Change-Id: I6806955952fbfa3227294cfc44fdf9156140e933 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>