coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-08-14	src/mainboard: Capitalize ROM, RAM, CPU and APIC	Elyes HAOUAS
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-06-04	AGESA boards: Split dispatcher to romstage and ramstage	Kyösti Mälkki
2016-05-10	AGESA boards: Relocate platform memory config	Kyösti Mälkki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-06-08	Remove empty lines at end of file	Elyes HAOUAS
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-10	AGESA: Drop unused AGESA_MEM_TABLE	Kyösti Mälkki
2015-01-06	Remove AMD's "Release Content" doxygen from coreboot files	Martin Roth
2014-07-18	mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platforms	Edward O'Callaghan
2014-06-14	mainboard/amd: De-ASCIIartify reference boards	Edward O'Callaghan
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2013-02-26	AMD Inagua: buildOpts.c: Adapt whitespace to coding style	Paul Menzel
2012-02-07	Inagua: Indent and wihtespace cleanup	Kerry Sheh
2012-02-07	Inagua: Synchronize AMD/inagua mainboard.	Kerry Sheh
2011-11-01	remove trailing whitespace	Stefan Reinauer
2011-02-14	Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8.	Frank Vibrans