coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2022-10-14	mb/amd/gardenia/devicetree: disable unused gpp_bridge_2	Felix Held
	The board's PCIe port descriptors have the PCIe engine disabled, so update the devicetree accordingly. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic97a54c3cc762a36752d6b9f21467428912a9edd Reviewed-on: https://review.coreboot.org/c/coreboot/+/68379 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-14	mb/amd/gardenia/devicetree: use device aliases	Felix Held
	Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9a429c0fd23eb3b52a19a974b22079d675e3506a Reviewed-on: https://review.coreboot.org/c/coreboot/+/68318 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-13	mb/amd,google/*/devicetree: drop CPU cluster device for Stoneyridge	Felix Held
	Since commit 60e9114c6210 ("include/device: ensure valid link/bus is passed to mp_cpu_bus_init"), no dummy LAPIC device is required under the CPU cluster device. Since the CPU cluster device is already present in the Stoneyridge chipset devicetree, drop the whole CPU cluster part from the mainboard's devicetrees. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8918c14be25ac9756926a9c6a2806a3dceced42a Reviewed-on: https://review.coreboot.org/c/coreboot/+/68317 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-13	mb/amd/gardenia,padmelon/devicetree: explicitly enable IOMMU device	Felix Held
	PCI devices that aren't present in the devicetree will be treated as enabled. Since the chipset devicetree that will be added in a follow-up patch disables this device by default, explicitly enable the IOMMU device on the Stoneyridge mainboards that don't disable it to keep the same behavior. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4a2cdd00abe8309244829dc633dd8a9ca0038dfa Reviewed-on: https://review.coreboot.org/c/coreboot/+/68313 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-18	mainboard///*.cb: Remove leading blank lines from SPDX header	Elyes HAOUAS
	Change-Id: Ia0dbf7b946d42bda11b904a9caff5a402b553b33 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41359 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
	Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " \|egrep ":( /\.\/\$\|#\|;#\|-- \| \ )" \| cut -d: -f1 \|grep -v crossgcc \|grep -v gcov \| grep -v /elf.h \|grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. /") -# This file is part of a set of unofficial pre-commit hooks available -/ This file is part of coreboot / -# This file is part of msrtool. -/ This file is part of msrtool. / - This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. / - This file is part of the coreboot project. - /* This file is part of the coreboot project. / -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/ This file is part of the coreboot project / -/ This file is part of the coreboot project. / -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. / -/ This file is part of the ectool project. / - This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. / -## This file is part of the superiotool project. -/ This file is part of the superiotool project / -/ This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
	Used commands: perl -i -p0e 's\|\/\[\s].is free software[:;][\s]you[\s]can[\s]redistribute[\s]it[\s]and\/or[\s]modify[\s]it[\s]under[\s]the[\s]terms[\s]of[\s]the[\s]GNU[\s]General[\s]Public[\s]License[\s]as[\s]published[\s]by[\s]the[\s]Free[\s]Software[\s]Foundation[;,][\s]version[\s]2[\s]of[\s]the[\s]License.[\s]This[\s]program[\s]is[\s]distributed[\s]in[\s]the[\s]hope[\s]that[\s]it[\s]will[\s]be[\s]useful,[\s]but[\s]WITHOUT[\s]ANY[\s]WARRANTY;[\s]without[\s]even[\s]the[\s]implied[\s]warranty[\s]of[\s]MERCHANTABILITY[\s]or[\s]FITNESS[\s]FOR[\s]A[\s]PARTICULAR[\s]PURPOSE.[\s]See[\s]the[\s]GNU[\s]General[\s]Public[\s]License[\s]for[\s]more[\s]details.[\s]\\/\|/ SPDX-License-Identifier: GPL-2.0-only /\|' $(cat filelist) perl -i -p0e 's\|\/\[\s].is[\s]free[\s]software[:;][\s]you[\s]can[\s]redistribute[\s]it[\s]and/or[\s]modify[\s]it[\s]under[\s]the[\s]terms[\s]of[\s]the[\s]GNU[\s]General[\s]Public[\s]License[\s]as[\s]published[\s]by[\s]the[\s]Free[\s]Software[\s]Foundation[;,][\s]either[\s]version[\s]2[\s]of[\s]the[\s]License,[\s]or[\s].at[\s]your[\s]option.[\s]any[\s]later[\s]version.[\s]This[\s]program[\s]is[\s]distributed[\s]in[\s]the[\s]hope[\s]that[\s]it[\s]will[\s]be[\s]useful,[\s]but[\s]WITHOUT[\s]ANY[\s]WARRANTY;[\s]without[\s]even[\s]the[\s]implied[\s]warranty[\s]of[\s]MERCHANTABILITY[\s]or[\s]FITNESS[\s]FOR[\s]A[\s]PARTICULAR[\s]PURPOSE.[\s]See[\s]the[\s]GNU[\s]General[\s]Public[\s]License[\s]for[\s]more[\s]details.[\s]\\/\|/* SPDX-License-Identifier: GPL-2.0-or-later /\|' $(cat filelist) perl -i -p0e 's\|\/\[\s].is[\s#]free[\s#]software[;:,][\s#]you[\s#]can[\s#]redistribute[\s#]it[\s#]and/or[\s#]modify[\s#]it[\s#]under[\s#]the[\s#]terms[\s#]of[\s#]the[\s#]GNU[\s#]General[\s#]Public[\s#]License[\s#]as[\s#]published[\s#]by[\s#]the[\s#]Free[\s#]Software[\s#]Foundation[;:,][\s#]either[\s#]version[\s#]3[\s#]of[\s#]the[\s#]License[;:,][\s#]or[\s#].at[\s#]your[\s#]option.[\s#]any[\s#]later[\s#]version.[\s#]This[\s#]program[\s#]is[\s#]distributed[\s#]in[\s#]the[\s#]hope[\s#]that[\s#]it[\s#]will[\s#]be[\s#]useful[;:,][\s#]but[\s#]WITHOUT[\s#]ANY[\s#]WARRANTY[;:,][\s#]without[\s#]even[\s#]the[\s#]implied[\s#]warranty[\s#]of[\s#]MERCHANTABILITY[\s#]or[\s#]FITNESS[\s#]FOR[\s#]A[\s#]PARTICULAR[\s#]PURPOSE.[\s#]See[\s#]the[\s#]GNU[\s#]General[\s#]Public[\s#]License[\s#]for[\s#]more[\s#]details.[\s]\\/\|/* SPDX-License-Identifier: GPL-3.0-or-later /\|' $(cat filelist) perl -i -p0e 's\|(\#\#)[\w].is free software[:;][\#\s]you[\#\s]can[\#\s]redistribute[\#\s]it[\#\s]and\/or[\#\s]modify[\#\s]it[\s\#]under[\s \#]the[\s\#]terms[\s\#]of[\s\#]the[\s\#]GNU[\s\#]General[\s\#]Public[\s\#]License[\s\#]as[\s\#]published[\s\#]by[\s\#]the[\s\#]Free[\s\#]Software[\s\#]Foundation[;,][\s\#]version[\s\#]2[\s\#]of[\s\#]the[\s\#]License.[\s\#]This[\s\#]program[\s\#]is[\s\#]distributed[\s\#]in[\s\#]the[\s\#]hope[\s\#]that[\s\#]it[\s\#]will[\#\s]be[\#\s]useful,[\#\s]but[\#\s]WITHOUT[\#\s]ANY[\#\s]WARRANTY;[\#\s]without[\#\s]even[\#\s]the[\#\s]implied[\#\s]warranty[\#\s]of[\#\s]MERCHANTABILITY[\#\s]or[\#\s]FITNESS[\#\s]FOR[\#\s]A[\#\s]PARTICULAR[\#\s]PURPOSE.[\#\s]See[\#\s]the[\#\s]GNU[\#\s]General[\#\s]Public[\#\s]License[\#\s]for[\#\s]more[\#\s]details.\s(# \n)\|\1 SPDX-License-Identifier: GPL-2.0-only\n\n\|' $(cat filelist) perl -i -p0e 's\|(\#\#)[\w].is free software[:;][\s]you[\s]can[\s]redistribute[\s]it[\s]and\/or[\s]modify[\s]it[\s]under[\s]the[\s]terms[\s]of[\s]the[\s]GNU[\s]General[\s]Public[\s]License[\s]as[\s]published[\s]by[\s]the[\s]Free[\s]Software[\s]Foundation[;,][\s]version[\s]2[\s]of[\s]the[\s]License.[\s]This[\s]program[\s]is[\s]distributed[\s]in[\s]the[\s]hope[\s]that[\s]it[\s]will[\s]be[\s]useful,[\s]but[\s]WITHOUT[\s]ANY[\s]WARRANTY;[\s]without[\s]even[\s]the[\s]implied[\s]warranty[\s]of[\s]MERCHANTABILITY[\s]or[\s]FITNESS[\s]FOR[\s]A[\s]PARTICULAR[\s]PURPOSE.[\s]See[\s]the[\s]GNU[\s]General[\s]Public[\s]License[\s]for[\s]more[\s]details.\s(#* \n)\|\1 SPDX-License-Identifier: GPL-2.0-only\n\n\|' $(cat filelist) Change-Id: Ia01908544f4b92a2e06ea621eca548e582728280 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41178 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
	They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I57fc98788bb47df16d6aedd0f0701e9991801743 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2019-12-12	AGESA, binaryPI: Remove generic device for SPD eeproms	Kyösti Mälkki
	These entries have no functional purpose, followup work will disallow chip entries that do not link in the respective driver. Change-Id: Ieab695022d0dd2f2671f9058db97bdd6fb29a10d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2017-11-20	amd/stoneyridge: Fix SPD files and functions camel case	Marc Jones
	Remove ugly camel case in the soc/amd/common and Stoney Ridge SPD files and functions. Update the related mainboards. Also, remove a unreferenced function prototype, smbus_readSpd(). Change-Id: I51045b6621f0708d61a570acbdcb4e6522baa1ea Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/22483 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-22	amd/gardenia: Add PSP to devicetree.cb	Marshall Dawson
	Add the missing device and ensure it shows up in the devicetree prior to PCI enumeration. Change-Id: I44c7df6a2be149ed61094f67ef1c578736e5b55c Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/22054 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-26	amd/gardenia: Switch to soc/amd/stoneyridge	Marc Jones
	Switch Garnenia mainboard to single soc/ directory structure. Change-Id: I095804d603bcccf324d3244965081a9dccba62ae Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19725 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-22	agesa and binaryPI mainboards: Fix devicetree hudson comments	Marshall Dawson
	Make the ending comment associated with "chip ...hudson" match the appropriate directory name. Change-Id: I5e0d6d41a2e3f963760aad08ed6108acac5b66b3 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/17904 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
2016-12-16	amd/gardenia: Correct SPD AGESA callout	Marshall Dawson
	Gardenia makes no special considerations for a board_id regarding SPD access and addressing. Remove this from the source and use the standard AGESA call. Make SPD address changes to devicetree.cb. Note that Gardenia is designed to be a two channel, single DIMM/channel system (some SKUs with two DIMMs on the second channel). However, this port is for the Stoney processor which is a single channel. As a result, the second DIMM slot is not usable. A future improvement could involve a port using a different processor, with unique devicetree files for each. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Marc Jones <marcj303@gmail.com> (cherry picked from commit 77511f98f819dfe08c3ed16ebc11e1b328bdca15) Change-Id: Id00c2be83340ceeec043ec86e96779e6bf46ae7b Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17219 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-16	mainboard/amd: Copy bettong to gardenia and update for build	Marc Jones
	Use bettong as the reference for the gardenia mainboard. Update makefiles etc so it builds. This patch intentionlly keeps the carrizo_fch.asl file to remain synchronized with the AMD PI package. Remove items that do not apply to the Stoney APU, rewrite the comments associated with the PCIe devices, and fix up the SPD register association to match the 00670F00 chip.h. Original-Signed-off-by: Marc Jones <marcj303@gmail.com> Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> (cherry picked from commit 82accfcf9ec76a042156fb6e528f7900987b6e7e) Change-Id: I014fec5c99c01fc02e129be514b704c8ba27d464 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/17218 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>