| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2012-04-19 | Leverage the Pstate table created by AGESA. | zbao | |
| The name of processor created by AGESA is P00n, whose P is BLDCFG_PROCESSOR_SCOPE_NAME(is 'C' if it is undefined.) and n starts from 0. The dsdt should be aligned with that. This feature has only been tested on persimmon. The changes on all the other boards were propagated. Change-Id: I8c3fa4b94406d530d2bed8e9a1f42b433bbec3ec Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/884 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com> | |||
| 2012-02-17 | Mainboard: Add AMD dinar mainboard. | Kerry Sheh | |
| Dinar mainboard is an AMD evaluation board for Orochi Platform family15 model 00-0f processor. The mainbaord has dual G34 Socket, SR5690/SR5670/SR5650 and SP5100 chipsets. 16 cores InterLagos Opteron processor are supported. Windows 7 are verified on this platform. Change-Id: Id97d35e7bca9f0d422841e23f4b762f1ed101ea0 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/564 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com> | |||
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |