coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2009-01-16	The DBM90T code sets bit 10 in _PSS as part of the control value, but	Carl-Daniel Hailfinger
2009-01-12	Check to see if K8 processor is capable of changing FIDVID otherwise it will ...	Dan Lykowski
2009-01-06	The ACPI PSS CPU Pstate table was calculating the frequency incorrectly for	Marc Jones
2008-12-24	Fix AMD Pistachio implicit declarations in the same way as with AMD	Zheng Bao
2008-12-24	Fix implicit declarations in the AMD DBM690T target by using the right	Carl-Daniel Hailfinger
2008-12-23	Handle RS690 quirks for 1 GHz noncoherent HyperTransport.	Carl-Daniel Hailfinger
2008-12-23	Remove a unneccessary typedef from acpi_tables.c in the AMD Pistachio	Carl-Daniel Hailfinger
2008-12-13	Move mainboard specific changes to the coreboot memory table into the	Stefan Reinauer
2008-12-05	The TALERT of ADT7461 should be pull back high if the temperature is within t...	Maggie Li
2008-12-02	I missed the svn add on r3787. These are the additional files.	Joe Bao
2008-12-01	Add AMD dbm690t ACPI support.	Joe Bao
2008-11-28	This patch from Ralf Grosse Boerger makes debugging more comfortable.	Stefan Reinauer
2008-10-02	Fix a typo.	Carl-Daniel Hailfinger
2008-10-02	Use easily readable macros to setup interrupt routing.	Carl-Daniel Hailfinger
2008-10-01	The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of	Carl-Daniel Hailfinger
2008-09-26	Add IRQ12 to the dbm690t mptable for mouse interrupt support.	Marc Jones
2008-09-22	Patch for AMD DBM690T board.	Michael Xie