coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2024-09-30	soc/amd/glinda: Update gpp bridge naming scheme	Maximilian Brune
	This patch updates the naming scheme used for the GPP bridges. The naming scheme now matches what we also have on phoenix. Change-Id: I9f740d75a3561dba2ed65acb16bb4259f632307d Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84378 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2024-09-26	mb/amd/birman*/devicetree_glinda.cb: Add usb3_port1	Maximilian Brune
	Change-Id: Ida2499d9894aa99f341c7a6ef2cd93b3f8ea61fe Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2024-09-26	soc/amd/glinda/chipset.cb: Update for glinda	Satya SreenivasL
	This also updates the mainboards depending on it. Change-Id: I1138f27bfd47f6fa70a0c2afcc65a5553a609d57 Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84376 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-09-23	mb/amd/birman_plus: Fix menuconfig option for EC firmware path	Ana Carolina Cabral
	Menu option wasn't showing due to wrong config flag. Change-Id: I30592a8c3e57017473511366a8cf11928e55b5e9 Signed-off-by: Ana Carolina Cabral <ana.cpmelo95@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84438 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2024-04-15	mb/amd/*: Increase SMMSTORE size to 256K	Matt DeVillier
	Anything below 128K will cause SMMSTORE driver in edk2 to fail, since a minimum of (2) 64K blocks are needed. Increase the size to 256K to match other boards in the tree. Change-Id: I04d57ff7f74d79118652cfe227cf223375df6472 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81865 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-03-12	mb/amd/birman_plus: Update glinda DXIO descriptors per schematics	Anand Vaikar
	glinda FP8 SOC PCIe lanes are updated per the Birman+ schematics document 105-D99700-00C revision 1.0. Change-Id: If22e57fc57b4824550f2dfa8b843a7809c85dbb6 Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81036 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-02-29	mb/amd/birman_plus: Add glinda SOC option for Birman+	Anand Vaikar
	Change-Id: I1efeb7cf1dca31e2a7e17f483f8882925b55e7ea Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80770 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2024-02-21	mb/amd/birman_plus: Add Birman+ board support for Phoenix SOC	Anand Vaikar
	1) Initial commit for upstreaming Birmanplus mainboard changes. 2) Add the DXIO descriptors for Birmanplus mainboard. Change-Id: I075dcf0214f8dc8b33b0e429d83d270b2f0952e1 Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>