coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2022-12-06	mb/amd/birman/gpio: Change non-GEvent GPIOs to PAD_INT	Fred Reitberger
	Two GPIOs were set as SCI, but are not GEvent capable pins on morgana. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I00dc1b2595c047ce6898b394061d119ac8680755 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-30	mb/amd/birman/gpio: Configure birman GPIOs	Fred Reitberger
	Configure birman GPIOs per schematic 105-D67000-00B v0.7 Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f Reviewed-on: https://review.coreboot.org/c/coreboot/+/69411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-15	soc/amd: commonize generation of the PIC/APIC mapping tables	Felix Held
	Now that we have a common init_tables in all mainboards using AMD SoCs, both the population of the fch_pic_routing and fch_apic_routing arrays and the definition of those arrays can be moved to the common AMD SoC code to not have the code duplicated in all mainboards. BUG=b:182782749 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68853 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-29	mb/amd/birman: Update Birman to work with Morgana or Glinda	Martin Roth
	Birman should work with either Morgana or Glinda SoCs, so configure the mainboard to allow building with either. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I56206cd9ad5db99c00b734430b250e04ea9e0609 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68932 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
2022-10-26	mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation	Felix Held
	This ports the changes to the way the fch_pic_routing and fch_apic_routing arrays get populated from Mandolin to Bilby, Birman, Chausie and Majolica. This is a preparation to move the init_tables implementation to the common AMD SoC code in a later patch. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia957056b60dafbc52a9809a4563a348ad7443376 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2022-10-26	mb/amd,google: unify fch_irq_routing struct instance name	Felix Held
	Use the same fch_irq_map name in all mainboards using the Picasso, Cezanne, Mendocino and Morgana instead of using a mainboard-specific name. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I035cffb9c6c8afd6bd115831e8eed4a395e2a7fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/68846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2022-10-26	soc/amd/common/include: introduce and use FCH_IRQ_ROUTING_ENTRIES	Felix Held
	Instead of using magic constants for the fch_pic_routing and fch_apic_routing array sizes, define FCH_IRQ_ROUTING_ENTRIES in the common code headers and use this definition. This also allows to drop the static assert for the array sizes. In the Stoneyridge mainboard code the equivalent arrays are named mainboard_picr_data and mainboard_intr_data; also use FCH_IRQ_ROUTING_ENTRIES as fixed array size there. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2d7ee46bd013ce413189398a144e46ceac0c2a10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68818 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-26	mb/amd,google: move fch_irq_routing struct definition to soc/amd	Felix Held
	Define the fch_irq_routing struct once in a common header file instead of in every mainboard's code. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I11d9000b6ed7529e4afd7f6e8a7332c390da6dab Reviewed-on: https://review.coreboot.org/c/coreboot/+/68817 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-10-10	mb/amd/birman: Add framework for morgana crb birman	Martin Roth
	birman is the reference board for the morgana SoC. It needs to be updated to match the actual board design as well. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I4b16854c954949217a76c3d4f04ddc4001f64337 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68196 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>