coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2004-11-05	- Modify all of the Opteron motherboards to have a separate logical	Eric Biederman
	chip for the amdk8/root_complex git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04	Add Options.lb to various motherboard ports	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1738 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04	- Update abuild.sh so it will rebuild successfull builds	Eric Biederman
	- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21	update failover handling of some amd64 boards	Stefan Reinauer
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21	- Bump the LinuxBIOS major version	Eric Biederman
	- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16	- First stab at running linuxbios without the old static device tree.	Eric Biederman
	Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08	move default_resource_map to its own file	Li-Ta Lo
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-06	replace up,across,down with ltd0,ldt1, ldt2	Li-Ta Lo
	Although it is not used currently, misuse of terminolog is still a misuse. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-30	put extern keyword in front of declaration, make the compiler do it job	Li-Ta Lo
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-25	remove traces of coherent_ht_mainboard	Stefan Reinauer
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-24	Further trimming freebios2 towards code reuse.	Stefan Reinauer
	Unified AMD K8 reset function that can be customized via mainboard Config.lb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-24	small step to clean up mainboard directories. debug.c was basically identical	Stefan Reinauer
	on all amd64 motherboards, so it moved to the amdk8 specific code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-27	will mainboards	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1357 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1