summaryrefslogtreecommitdiff
path: root/src/include/cpu
AgeCommit message (Expand)Author
2023-04-06cpu/x86/topology: Add code to fill in topology on struct pathArthur Heymans
2023-04-06cpu/smm_module_loader.c: Fix up CPU index locallyArthur Heymans
2023-04-06cpu/x86/mp_init.c: Generate a C header to get start32 offsetArthur Heymans
2023-04-06cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_pathArthur Heymans
2023-03-24cpu/intel: Remove redefined SAPPHIRERAPIDS_SP CPUID to fix build errorJohnny Lin
2023-03-23soc/amd/common/block/acpi/cpu_power_state: use pstate_msr unionFelix Held
2023-03-23soc/intel/xeon_sp: Report platform cpu infoNaresh Solanki
2023-03-19soc/intel/xeon_sp/spr: Add header files and romstage codeJonathan Zhang
2023-03-13cpu/x86/cache: CLFLUSH programs to memory before runningArthur Heymans
2023-03-08soc/amd/include/msr: factor out P state MSR enable bit to cpu/amd/msr.hFelix Held
2023-03-05cpu/x86/smm: Add PCI resource store functionalityRobert Zieba
2023-02-28soc/amd: introduce and use PSTATE_MSR macroFelix Held
2023-02-15cpu/x86/smm: Enable setting SMM console log level from mainboardJohnny Lin
2023-02-07src: Move POST_BOOTBLOCK_CAR to common postcodes and use itMartin Roth
2023-02-02include/cpu/amd/mtrr: drop unused TOP_MEM_MASK definitionsFelix Held
2023-01-19tree: Drop Intel Ice Lake supportFelix Singer
2023-01-09security/intel/txt: Add helper function to disable TXTSubrata Banik
2022-12-10cpu/cpu.h: Change the function signatureArthur Heymans
2022-12-10treewide: Include <device/mmio.h> instead of <arch/mmio.h>Elyes Haouas
2022-12-07mb,sb,soc/intel: Drop useless IO trap handlersKyösti Mälkki
2022-12-05cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfmArthur Heymans
2022-11-23cpu/intel/car: Define post codesMartin Roth
2022-11-17mb/emulation/qemu-q35: Split smm_close() and smm_lock()Kyösti Mälkki
2022-11-16cpu/x86/smm: Use common SMM_ASEG regionKyösti Mälkki
2022-11-14cpu/cpu.h: Remove unused functions prototypesArthur Heymans
2022-11-12include/cpu/msr.h: transform into an unionArthur Heymans
2022-11-10cpu/x86/lapic.h: Fix CONFIG_X2APIC_RUNTIMEArthur Heymans
2022-11-09cpu/*: Drop PARALLEL_MP leftoversArthur Heymans
2022-11-03treewide: Add 'IWYU pragma: export' commentElyes Haouas
2022-10-21arch/x86/include: Split msr access into separate fileMartin Roth
2022-09-24include/cpu/x86/mtrr: define NUM_FIXED_MTRRS once in mtrr.hFelix Held
2022-09-16soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU IDJeremy Soller
2022-09-15soc/amd: Do SMM relocation via MSRArthur Heymans
2022-08-11include: Add SPDX identifiers to files missing themMartin Roth
2022-08-01include: Add SPDX-License-Identifiers to files missing themMartin Roth
2022-07-18arch/x86: Add X2APIC_LATE_WORKAROUNDSubrata Banik
2022-06-28soc/intel: Add Raptor Lake device IDszhixingma
2022-06-22cpu/intel/microcode: Have API to re-load microcode patchSubrata Banik
2022-06-17soc/intel/alderlake/report_platform.c: Add ADL-S identificationMichał Żygowski
2022-06-09soc/amd/sabrina/acpi: Correct VID decoding on SabrinaFred Reitberger
2022-06-02cpu/x86/mp_init.c: Prolong delay on synchronous APIArthur Heymans
2022-06-02cpu/x86/mp.h: Implement a pre-SSE2 mfenceArthur Heymans
2022-06-01mb/emulation/qemu-q35: Support PARALLEL_MP with SMM_ASEGArthur Heymans
2022-06-01Revert "cpu/x86: Add function to set `put_back_original_solution` variable"Arthur Heymans
2022-05-28cpu/x86/mp_init.c: Drop 'real' vs 'used' save stateArthur Heymans
2022-05-16soc/intel: Add Raptor Lake device IDsBora Guvendik
2022-05-16arch/x86/postcar: Set up postcar MTRR in C codeArthur Heymans
2022-05-16cpu/x86/mp_init.c: Add mp_run_on_all_cpus_synchronouslyKane Chen
2022-04-13cpu/x86: Add function to set `put_back_original_solution` variableKane Chen
2022-04-04soc/intel/alderlake: Add new CPU IDLean Sheng Tan
2022-04-04soc/intel/alderlake: Update CPU IDs with correct steppingsLean Sheng Tan
2022-03-10cpu/x86/smm: Add weak SoC init and exit methodsRaul E Rangel
2022-03-09cpu/intel/common: Add support for energy performance preference (EPP)Cliff Huang
2022-03-09soc/intel/common: Include Meteor Lake device IDsWonkyu Kim
2022-03-09cpu/x86/smm,lib/cbmem_console: Enable CBMEMC when using DEBUG_SMIRaul E Rangel
2022-02-11src/arch/ppc64/*: pass FDT address to payloadSergii Dmytruk
2022-02-11src/cpu/power9: add file structure for power9, implement SCOM accessIgor Bagnucki
2022-02-10Revert "cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available"Felix Held
2022-02-07cpu/x86/mp_init.c: Rename num_concurrent_stacksArthur Heymans
2022-02-07cpu/x86/smm: Improve smm stack setupArthur Heymans
2022-02-05cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki
2022-02-05cpu/x86/lapic: Fix choice X2APIC_ONLYKyösti Mälkki
2022-02-05cpu/x86/lapic: Add lapic_send_ipi_self,others()Kyösti Mälkki
2022-02-05cpu/x86/lapic: Unify some parameterKyösti Mälkki
2022-02-05cpu/x86/lapic: Support switching to X2APIC modeKyösti Mälkki
2022-02-05cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if availableKyösti Mälkki
2022-02-03cpu/x86/smm: Retype variablesArthur Heymans
2022-02-01cpu/x86/smm: Add SMM_LEGACY_ASEGKyösti Mälkki
2021-11-30include/cpu/x86/mp.h: Remove indirect includeArthur Heymans
2021-11-29src/cpu,soc/amd/common/block/cpu: Add preload_microcodeRaul E Rangel
2021-11-29soc/intel/common: Include Alder Lake-N device IDsUsha P
2021-11-03cpu/amd/mtrr: Remove topmem global variablesArthur Heymans
2021-11-03cpu/amd/mtrr/amd_mtrr.c: Remove unused functionsArthur Heymans
2021-10-26src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper functionFelix Held
2021-10-22cpu/x86/mp_init: use cb_err as status return type in remaining functionsFelix Held
2021-10-21cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held
2021-10-18cpu/x86/lapic: Drop xapic_write_atomic()Kyösti Mälkki
2021-10-05arch/x86,cpu/x86: Introduce new method for accessing cpu_infoRaul E Rangel
2021-10-05src/acpi to src/lib: Fix spelling errorsMartin Roth
2021-09-30soc/intel/alderlake: Add CPU ID 0x906a4Meera Ravindranath
2021-08-24soc/intel: Add TGL-H CPUIDJeremy Soller
2021-08-16soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS KconfigSubrata Banik
2021-08-15soc/intel/common: Calculate and configure SF Mask 2Subrata Banik
2021-08-04Move post_codes.h to commonlib/console/Ricardo Quesada
2021-07-24include/cpu: Remove one space from bitfield macro definitionSubrata Banik
2021-07-24include/cpu: Use tab instead of spaceSubrata Banik
2021-07-17cpu/intel: Add dedicated file to grow Intel CPUIDsSubrata Banik
2021-07-16include/cpu/amd/msr: don't redefine the IA32_BIOS_SIGN_ID MSRFelix Held
2021-07-14include/cpu/amd/msr: add and use MC_CTL_MASK macroFelix Held
2021-07-14include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msrFelix Held
2021-07-14include/cpu/x86/msr: add mca_clear_status functionFelix Held
2021-07-14include/cpu/x86/msr: introduce IA32_MC_*(x) macrosFelix Held
2021-07-14include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISCFelix Held
2021-07-12include/cpu/x86/msr: fix MCG_CTL_P definitionFelix Held
2021-07-12include/cpu/x86/msr: add mca_get_bank_count functionFelix Held
2021-07-06arch/x86: Use ENV_X86_64 instead of _x86_64_Patrick Rudolph
2021-06-25Asm code: Use NO_EARLY_BOOTBLOCK_POSTCODES to remove Asm port80sMartin Roth
2021-06-22soc/intel/car: Add support for bootguard CARArthur Heymans
2021-06-21soc/intel/common: Add InSMM.STS supportAngel Pons
2021-06-19soc/intel/common/block/smm: Add `mainboard_smi_finalize`Aseda Aboagye