summaryrefslogtreecommitdiff
path: root/src/include/cpu
AgeCommit message (Expand)Author
2012-11-20Unify use of bool config variablesStefan Reinauer
2012-11-14SMM: Avoid use of global variables in SMI handlerDuncan Laurie
2012-11-13Pass the CPU index as a parameter to startup.Ronald G. Minnich
2012-11-12Fix gcc-4.7 building problem.Han Shen
2012-11-05Overhaul speedstep codeNico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-09-05buildsystem: Make CPU microcode updating more configurableAlexandru Gagniuc
2012-08-09AMD northbridge: copy TOP_MEM and TOP_MEM2 for distributionKyösti Mälkki
2012-08-09Synchronize rdtsc instructionsStefan Reinauer
2012-08-07Move cpus_ready_for_init() to AMD K8Kyösti Mälkki
2012-07-31Revert "Use broadcast SIPI to startup siblings"Sven Schnelle
2012-07-25SMM: rename tseg_fixup to tseg_relocate and exportDuncan Laurie
2012-07-24SMM: Fix state save map for sandybridge and TSEGDuncan Laurie
2012-07-24Add code to read Intel microcode from CBFSVadim Bendebury
2012-07-04Intel cpus: Extend cache to cover complete Flash DeviceKyösti Mälkki
2012-07-03AGESA F15 wrapper for Trinityzbao
2012-07-02Use broadcast SIPI to startup siblingsSven Schnelle
2012-07-02Intel CPUs: execute microcode update only once per coreKyösti Mälkki
2012-05-24cbtypes.h: Unify cbtypes.h used in AMD board's codeVikram Narayanan
2012-05-08Clean up #ifsPatrick Georgi
2012-04-27SMM: unify mainboard APM command handlersStefan Reinauer
2012-04-27cpu/cpu.h: add ROMCC guardsStefan Reinauer
2012-04-26Revamp Intel microcode update codeStefan Reinauer
2012-04-25Replace cache control magic numbers with symbolsPatrick Georgi
2012-04-06Fixes and Sandybridge support for lapic cpu initStefan Reinauer
2012-04-04Add support to run SMM handler in TSEG instead of ASEGStefan Reinauer
2012-04-03Add support for Intel Turbo Boost featureStefan Reinauer
2012-03-30Make MTRR min hole alignment 64MBDuncan Laurie
2012-03-30Add an option to keep the ROM cached after romstageStefan Reinauer
2012-03-29Add infrastructure for global data in the CAR phase of bootGabe Black
2012-03-16xchg is atomic with side-effectsPatrick Georgi
2012-03-08Unify Local APIC address definitionsPatrick Georgi
2012-02-16AGESA F15: AGESA family15 model 00-0fh cpu wrapperKerry Sheh
2012-01-10MTRR: get physical address size from CPUIDSven Schnelle
2011-11-01remove trailing whitespaceStefan Reinauer
2011-11-01Remove XIP_ROM_BASEPatrick Georgi
2011-10-28Get rid of AUTO_XIP_ROM_BASEPatrick Georgi
2011-09-15Build warning fix for AMD Family 12efdesign98
2011-09-12Miscellaneous AMD F14 warning fixesefdesign98
2011-08-04cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.Keith Hui
2011-07-13Make AMD SMM SMP awareRudolf Marek
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-28SMM: add guard and include types.h in cpu/x86/smm.hSven Schnelle
2011-06-15SMM: don't overwrite SMM memory on resumeSven Schnelle
2011-06-07SMM: add defines for APM_CNT registerSven Schnelle
2011-06-06SMM: add mainboard_apm_cnt() callbackSven Schnelle
2011-05-15Cosmetic cleanup.Scott Duplichan
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-21some ifdef --> if fixesStefan Reinauer
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-04-10In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.Stefan Reinauer
2011-02-14I missed a file that was part of the AMD AGESA CPU wrapper checkin, r6347.Frank Vibrans
2011-01-19Revert r5902 to make code more readable again. At least three people like toStefan Reinauer
2011-01-19Now that the VIA code is run above 1Meg (like other boards), it shouldKevin O'Connor
2010-12-29-Change the remaining GLIU1 port 5 register names from VIP (Video Input Port)Nils Jacobs
2010-12-26Replace Geode GX2 MSR addresses for GLCP on GLIU1 with namesNils Jacobs
2010-12-26Clean up Geode GX2 comments, whitespace and coding style. Trivial.Nils Jacobs
2010-12-18SMM for AMD K8 Part 1/2Stefan Reinauer
2010-12-17guard against the case that CONFIG_WAIT_BEFORE_CPUS_INIT is not defined at all.Stefan Reinauer
2010-12-11factor out cpu power management base into a separate file. And fix a bug inStefan Reinauer
2010-12-08second round name simplification. drop the <component>_ prefix.stepan
2010-11-18For completeness sake: License header.Patrick Georgi
2010-11-17Move Intel power management related defines to some central location.Patrick Georgi
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-11-01Change Geode GX2 to use the auto DRAM detect code from Geode LX.Nils Jacobs
2010-11-01GX2: Clean up some white space and comments.Nils Jacobs
2010-10-12Reduce duplicate definition in CAR code.Warren Turkal
2010-10-01Factor out common CAR asm snippets.Uwe Hermann
2010-10-01CAR simplifications, typos, readability improvements (trivial).Uwe Hermann
2010-09-29Factor out fill_processor_name() and strcpy() functions.Uwe Hermann
2010-09-17AMD Fam10 code breaks with gcc 4.5.0.Scott Duplichan
2010-09-13Generate multiboot tables from coreboot tables.Juhana Helovuo
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-03Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /Stefan Reinauer
2010-07-28Let Geode GX2 use geode_post_code.h just like Geode LXNils Jacobs
2010-07-26This patch converts the Geode GX2 boards to CAR.Nils Jacobs
2010-07-08Fix all warnings in the tree Stefan Reinauer
2010-07-08get rid of even more fam10 and k8 warnings.Stefan Reinauer
2010-07-07fix some more warningsStefan Reinauer
2010-06-10This commit updates the Geode LX GLCP delay control setup from the v2 way to ...Edwin Beasant
2010-05-19cosmetic comment changes.Stefan Reinauer
2010-05-16Sorry for this for second time. Now compile tested for both cases ;)Rudolf Marek
2010-05-16Sorry for this. I fixed that reverting the change for ROMCC.Rudolf Marek
2010-05-16Following patch reworks car_disable into C. Tested, works here. I comparedRudolf Marek
2010-05-14clean up some prototypesStefan Reinauer
2010-05-09Move includes to where they are needed. This allows to simplifyPatrick Georgi
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-04-25a single place for the romstage stack for copy_and_run.Stefan Reinauer
2010-04-25drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h"Stefan Reinauer
2010-04-22None of the cs5536 settings in devicetree.cb were ever used and nobody noticed.Stefan Reinauer
2010-04-21* clean up all but two warnings on artecgroup dbe61Stefan Reinauer
2010-04-16Fix a typo to remove a few more warnings.Myles Watson
2010-04-15Remove a few more warnings from fam10.Myles Watson
2010-04-08Cosmetically make init_cpus more similar for fam10 and K8.Myles Watson
2010-04-07move amd K8/Fam10 "bus detection" function prototypes to a common place.Stefan Reinauer
2010-04-06No warnings day, next round.Stefan Reinauer
2010-03-31Drop \r\n and \n\r as both print_XXX and printk now do this internally.Stefan Reinauer
2010-03-29dualcore.h and quadcore.h are almost exactly the same. Stefan Reinauer
2010-03-28drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is moreStefan Reinauer
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 17:33:07 +0000