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path: root/src/include/cpu/x86/msr.h
AgeCommit message (Expand)Author
2024-09-04include/cpu/x86: Add Misc Enable and Thermal Interrupt Register MacroSaurabh Mishra
2023-01-09security/intel/txt: Add helper function to disable TXTSubrata Banik
2022-11-12include/cpu/msr.h: transform into an unionArthur Heymans
2022-11-03treewide: Add 'IWYU pragma: export' commentElyes Haouas
2022-10-21arch/x86/include: Split msr access into separate fileMartin Roth
2022-08-01include: Add SPDX-License-Identifiers to files missing themMartin Roth
2022-03-09cpu/intel/common: Add support for energy performance preference (EPP)Cliff Huang
2022-02-05cpu/x86/lapic: Support switching to X2APIC modeKyösti Mälkki
2021-08-16soc/intel/common/block/cpu: Introduce CAR_HAS_L3_PROTECTED_WAYS KconfigSubrata Banik
2021-08-15soc/intel/common: Calculate and configure SF Mask 2Subrata Banik
2021-07-24include/cpu: Remove one space from bitfield macro definitionSubrata Banik
2021-07-24include/cpu: Use tab instead of spaceSubrata Banik
2021-07-14include/cpu/x86/msr: move MC0_CTL_MASK to include/cpu/amd/msrFelix Held
2021-07-14include/cpu/x86/msr: add mca_clear_status functionFelix Held
2021-07-14include/cpu/x86/msr: introduce IA32_MC_*(x) macrosFelix Held
2021-07-14include/cpu/x86/msr: add IA32_ prefix to MC0_ADDR and MC0_MISCFelix Held
2021-07-12include/cpu/x86/msr: fix MCG_CTL_P definitionFelix Held
2021-07-12include/cpu/x86/msr: add mca_get_bank_count functionFelix Held
2021-04-30cpu/x86/msr: introduce helpers msr_read, msr_writeMichael Niewöhner
2020-10-24cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner
2020-10-16include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner
2020-09-14src/include: Drop unneeded empty linesElyes HAOUAS
2020-09-14soc/intel/common/cpu: Update COS mask calculation for NEM enhanced modeAamir Bohra
2020-02-21security/intel/stm: Check for processor STM supportEugene Myers
2020-02-05security/intel/stm: Add STM supportEugene Myers
2019-12-19Drop ROMCC code and header guardsArthur Heymans
2019-12-18Revert "include/cpu/x86: Add STM Support"Aaron Durbin
2019-12-18include/cpu/x86: Add STM SupportEugene D. Myers
2019-10-31cpu/x86: make set_msr_bit publicly availableMichael Niewöhner
2019-06-21cpu/x86/msr: Move IA32_MISC_ENABLE bits to common placeElyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-11-08src: Replace common MSR addresses with macrosElyes HAOUAS
2018-10-30src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-08-17src/include: add more msr definesMatt Delco
2018-04-23cpu/x86: move NXE and PAT accesses to paging moduleAaron Durbin
2017-03-13src/include: Wrap lines at 80 columnsLee Leahy
2017-03-12src/include: Open brace on same line as enum or structLee Leahy
2017-03-09src/include: Fix unsigned warningsLee Leahy
2016-09-05src/include: Improve code formattingElyes HAOUAS
2016-07-31src/include: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2011-11-01remove trailing whitespaceStefan Reinauer
2010-09-17AMD Fam10 code breaks with gcc 4.5.0.Scott Duplichan
2010-06-10This commit updates the Geode LX GLCP delay control setup from the v2 way to ...Edwin Beasant
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-03-28drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is moreStefan Reinauer
2009-11-06Split the two usages of __ROMCC__:Myles Watson
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
2004-10-14- Renamed cpu header filesEric Biederman
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