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2024-02-12ec/lenovo/h8/acpi: Support pulsing LEDLOGO on Haswell ThinkPadsEvgeny Sorokin
The name LEDLOGO comes from schematics. It's the red indicator, embedded in the dot of the 'i' of the ThinkPad logo on laptop's lid. In vendor firmware, this led starts fading in-and-out, or, in other words, pulsing, when laptop is put to S3. It helps to determine whether the laptop is in S3 just by taking a look at the logo. As of now, coreboot doesn't do anything with this particular indicator, it's always in enabled (on) state, which is not very convenient. This patch fixes it. Tested on T440p. Change-Id: I85fb69c8c1bed8635a1b31e9b8385c7036bb46dd Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80437 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-01-31device/device.h: Rename busses for clarityArthur Heymans
This renames bus to upstream and link_list to downstream. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2024-01-31include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard
Macros can be confusing on their own; hiding commas make things worse. This can sometimes be downright misleading. A "good" example would be the code in soc/intel/xeon_sp/spr/chip.c: CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev, This appears as CHIP_NAME() being some struct when in fact these are defining 2 separate members of the same struct. It was decided to remove this macro altogether, as it does not do anything special and incurs a maintenance burden. Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0 Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
2024-01-24ec: Rename Makefiles from .inc to .mkMartin Roth
The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ic060f3605cd18d4bf774573c21957f626f984e2c Reviewed-on: https://review.coreboot.org/c/coreboot/+/80069 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2024-01-23ec/dell/mec5035: Hook up radio enables to option APINicholas Chin
Change-Id: Ibfa17ca83ca178c942d9c41533152235384e0cdf Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Original-Change-Id: I52de5ea3d24b400a93adee7a6207a4439eac61db Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/77535 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79011 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2024-01-23ec/dell/mec5035: Add command to control radio stateNicholas Chin
This was determined by sniffing the LPC bus while moving the hardware wireless switch between the enabled and disabled positions on the Latitude E6400. The vendor BIOS provides options to change which radios the switch controls, which was used to determine the mapping between each radio device and the command argument values. Change-Id: I173dc197d63cda232dd7ede0cb798ab0a364482b Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77534 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2023-12-20treewide: Use show_notices target for warningsMartin Roth
This updates all warnings currently being printed under the files_added and build_complete targets to the show_notices target. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ia14d790dd377f2892f047059b6d24e5b5c5ea823 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79423 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-12-13drivers/ipmi to lib: Fix misspellings & capitalization issuesMartin Roth
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I926ec4c1c00339209ef656995031026935e52558 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77637 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-12-11ec/google/chromeec: Provide ec_sync wake optionMark Hasemeyer
The ACPI spec defines keywords for the GpioInt and Interrupt resources to specify whether a given pin is wake capable. Some boards are using the ec sync interrupt pin to wake the system so the CREC _CRS needs to be updated accordingly. Provide a new macro that allows a board to specify whether its ec sync pin is wake capable. BUG=b:243700486 TEST=Dump ACPI and verify ExclusiveAndWake share type is set when EC_SYNC_IRQ_WAKE_CAPABLE is defined Change-Id: I483c801ff0fee4d3ce0a3b2fc220e0bd9356a612 Signed-off-by: Mark Hasemeyer <markhas@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79373 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Forest Mittelberg <bmbm@google.com>
2023-12-04ec/lenovo/h8/acpi/thermal: Make NameSeg FPWR all upper casePaul Menzel
Building the Lenovo T60/T60p, iasl 20230628 shows the remark below: dsdt.asl 2099: PowerResource (FPwR, 0, 0) Remark 2182 - ^ At least one lower case letter found in NameSeg, ASL is case insensitive - converting to upper case (FPWR) dsdt.asl 2118: Name (_PR0, Package () { FPwR }) Remark 2182 - ^ At least one lower case letter found in NameSeg, ASL is case insensitive - converting to upper case (FPWR) Address it by making it all upper case. Change-Id: Ia7924b015e76c43818d2d82da35ce0013d721c26 Fixes: 3ab13a8691cb ("ec/lenovo/h8/acpi/thermal: Add support for passive cooling") Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79367 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-11-16ec/google/chromeec: Update ec_cmd_api.h and ec_commands.hSimon Glass
Generated using update_ec_headers.sh [EC-DIR]. The original include/ec_commands.h version in the EC repo is: ab9b64ac4c Add a host command to print info about AP-firmware state The original include/ec_cmd_api.h version in the EC repo is: ab9b64ac4c Add a host command to print info about AP-firmware state BUG=b:300525571 BRANCH=none TEST=none Change-Id: I3570e073a91621cb1d28a24aa35c1f4beedceaab Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79066 Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-24ec/starlabs/merlin/ite: Adjust the mirror flag handlingSean Rhodes
In EC versions older than 1.18, if the mirror flag was enabled, the EC would mirror once the system reached S5. When a mirror is successful, the system will automatically power on, as it acts like it's been in G3. This led to machines turning on when the intention was them to be off. In 1.18 and later, they're installed when turning on. The result was slower boot times when mirroring, but no unwanted powering on. Because of this, coreboot no longer needs to power off when setting the mirror flag. Change-Id: I973c1ecd59f32d3353ca392769b44aadf5fcc9c3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-10-20Revert "ec/dell/mec5035: Hook up radio enables to option API"Matt DeVillier
This reverts commit bb5fa6419dfd71950e61e75eecd48ef8203bb1b1. Reason for revert: accidentally committed out of order; reverting to unbreak tree Change-Id: I36aa1fd3a0befe49b7e9e34198676f16fb08cf73 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78524 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: Martin L Roth <gaumless@gmail.com>
2023-10-20ec/dell/mec5035: Hook up radio enables to option APINicholas Chin
Change-Id: I52de5ea3d24b400a93adee7a6207a4439eac61db Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77535 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-10-16ec/google/chromeec: Add is_battery_present_and_above_critical_thresholdJamie Ryu
This adds is_battery_present_and_above_critical_threshold to check the battery is present and the battery level is above critical level. BUG=b:296952944 TEST=Build rex and check is_battery_present_and_above_critical_threshold returns the correct battery status. Change-Id: Ib38be55bc42559bab4f12d5e8580ddc3e1a6acc1 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-10-04ec/starlabs/merlin: Update the Q EventsSean Rhodes
Simplify the Q events for the battery and charger to just notify when a status has changed. The EC will trigger these events when either has changed. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3300be5254549fe5cd3b3490d9191240c6d36b6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/77405 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-02acpi/acpigen_ps2_keybd: Reduce minimum keys, optional alpha/num/punctJonathon Hall
Librem 11's volume keys act as a PS/2 keyboard with only those two keys. Reduce the minimum number of top-row keys to 2. Make the "rest of keys" (alphanumerics, punctuation, etc.) optional. Change-Id: Idf80b184ec816043138750ee0a869b23f1e6dcf2 Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78095 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-09-18clean-up: Remove the no more necessary `ENV_HAS_DATA_SECTION` flagJeremy Compostella
With commit b7832de0260b042c25bf8f53abcb32e20a29ae9c ("x86: Add .data section support for pre-memory stages"), the `ENV_HAS_DATA_SECTION' flag and its derivatives can now be removed from the code. Change-Id: Ic0afac76264a9bd4a9c93ca35c90bd84e9b747a2 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77291 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-09-17ec/hp/kbc1126: Use packed over attrbute__((packed))Elyes Haouas
Change-Id: Ia4b142a5eac2aab7e4fa6e32ed68c96934ec6c32 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77731 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-09-14vc/google/chromeos: Move clear_ec_ap_idle() to common codeDerek Huang
Previously the clear_ec_ap_idle() is implemented in cr50_enable_update.c and be called in the file. Move it to common code so that it can be called in cse_board_reset.c TEST=emerge-brask coreboot Change-Id: I2dbe41b01e70f7259f75d967e6df694a3e0fac23 Signed-off-by: Derek Huang <derekhuang@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77631 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org>
2023-09-07ec/lenovo/h8/h8.c: Use sizeof()Elyes Haouas
Use 'sizeof(ecfw)' instead of 'sizeof ecfw'. sizeof operator should only be used for types and variables require sizeof(). Change-Id: Ifae1680917bb0ce610e6ba753741aae233a71103 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-30ec/starlabs/merlin: Unconditionally enable the Keyboard BacklightSean Rhodes
KBL_STATE was originally intended to provide more granular control of the keyboard backlight. However, KBL_BRIGHTNESS has a valid value of "off" which achieves the same thing. Therefore, unconditionally set the KBL_STATE to enabled, and rely on KBL_BRIGHTNESS. Change-Id: Ic7ee6b96b1dcaa6633b111e92097bce87908885e Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77201 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-21ec/google/wilco/superio: Adjust PS2K HID/CID for Windows driversMatt DeVillier
Allows coolstar's Windows overlay drivers to attach, while not affecting operation under Linux or ChromeOS TEST=build/boot Win11, Linux 6.x on google/drallion Change-Id: I30ab2e9da00743c4d7086aac94652be46040f36d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77305 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-21ec/google/wilco/acpi: Read message when notifying UCSICoolStar
Allows the EC to be properly notified of type-c events like charger wattage too low (eg), TEST=build/boot Win11, Linux 6.x on google/drallion Change-Id: I7a4130cf6f8c24e3f91e327adf1f3e563322c0af Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77282 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-21ec/google/wilco: Correct scope of UCSI ACPI deviceCoolStar
Set the USCI device scope to _SB and set HID to USBC000 so Windows driver attaches. This matches the ACPI used by the non-Chromebook version of the Dell Latittude 7410 (which uses the same EC). TEST=build/boot Win11 on google/drallion Change-Id: If482fa4a4856c7bc085795bc72b35ebefe2f15c4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77281 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-21ec/google/wilco/acpi: Unhide GOOG000C ACPI deviceMatt DeVillier
Allows coolstar's Windows drivers to attach. TEST=build/boot Win11 on google/drallion Change-Id: Idd339811563cd2cdfc4cc31bc5660a62f4e36a66 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77280 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-08-21ec/google/wilco/acpi/dptf: Fix mutex synclevelMatt DeVillier
Both Windows and MacOS get cranky if the Mutex synclevel is non-zero, aborting any Acquire() call with Mutex param that has a non-zero synclevel. TEST=build/boot Win11 on google/drallion, verify DPTF driver loaded and functional. Change-Id: Ie77e9ed04658b508b2063ae219afcdc0ac465c58 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77279 Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-20ec/google/wilco: Fix ACPI EC RAM read/write opsMatt DeVillier
While debugging lack of battery status under Windows, it was discovered that the read/write flags in the args to the EC RAM 'ECRW' method were not being correctly identified. Force set them from the R() and W() methods which call ECRW() so those calls are processed properly. TEST=build/boot Windows on google/drallion, verify battery status, charging, etc are all reported properly. Change-Id: I2a40b8d50ba65213813c781e53b56cc1a8b8debf Signed-off-by: Coolstar <coolstarorganization@gmail.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72472 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-08-16ACPI: Add usb_charge_mode_from_gnvs()Kyösti Mälkki
Early Chromebook generations stored the information about USB port power control for S3/S5 sleepstates in GNVS, although the configuration is static. Reduce code duplication and react to ACPI S4 as if it was ACPI S5 request. Change-Id: I7e6f37a023b0e9317dcf0355dfa70e28d51cdad9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74524 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-08-11ec/starlabs/merlin/ite: Don't attempt EC mirror without a counterSean Rhodes
If the variable `mirror_flag_attempts` isn't accessible, or doesn't have a value, don't attempt to mirror the EC. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia39b2ce4ffcb8db3a335449c8bdb0d5c8a28a52c Reviewed-on: https://review.coreboot.org/c/coreboot/+/76581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-08-11ec/starlabs/merlin: Change the symbol to check before mirroringSean Rhodes
The EC should be mirrored (if it's out of date) unconditionally if the board support Thunderbolt. Use DRIVERS_INTEL_USB4_RETIMER instead of SOC_INTEL_COMMON_BLOCK_TCSS as it's more suitable. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I27b238d4d404746c9a70bacf8e60d9e0b0e1ccca Reviewed-on: https://review.coreboot.org/c/coreboot/+/76579 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-10ec/starlabs/merlin/ite: Print version mismatchesSean Rhodes
If the version of the EC firmware in coreboot doesn't match the firmware that the EC is running, print the versions. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I55c09b8d5ffe8ca9135384c823d005b55cfd83d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76380 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-10mb/starlabs/starbook/tgl: Use the merlin ec codeSean Rhodes
Switch the TGL variant to use the "merlin" EC variant, and delete the no longer needed "TGL" EC variant. This is not a functional change. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id4d305490b48c1c79ea52b0bbaa79b675412e0b4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76332 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-10mb/starlabs/starbook/adl: Use the merlin ec codeSean Rhodes
Switch the ADL variant to use the "merlin" EC variant, and delete the no longer needed "ADL" EC variant. This is not a functional change. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I61e56cc95a26be60d7f10c89d26bce2d857ae81a Reviewed-on: https://review.coreboot.org/c/coreboot/+/76313 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-08-10ec/starlabs/merlin: Remove the UCSI ACPISean Rhodes
The UCSI mailbox isn't used, so remove it. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I03587a2322b1f34fa26a5c2ba7906a4e1ae82ae0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-08-10ec/starlabs/merlin: Update the merlin variantSean Rhodes
Merlin was the name for the open-source variant of the EC. It ended up getting entirely rewritten to work with SDCC, and is currently being used on starbook/adl. The source code isn't available at the time of this commit due to some old ITE XLT code being used. Add the latest version of the code, replacing the old code, so the boards can be migrated over. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ib8384fc9322058297e8219ac8e483ac37a70bd33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74443 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-08-04ec/google/chromeec: move TBMC ACPI device under CRECMatt DeVillier
Tablet motion control is a function of the EC, and under Windows, the TBMC device needs to be initialized after CREC, or driver init will fail. The only way to ensure this happens is for TBMC to be a child device under CREC. TEST=build/boot Win11, Linux on google/eve, verify tablet mode drivers loaded and orientation switching functional under both OSes. Change-Id: I5e9eab9ae277b5a04dc2666960a727e5680bf6f4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76792 Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-07-31ec/google/chromeec: Unhide ChromeEC PD ACPI deviceMatt DeVillier
Set the ACPI status (_STA) for the PD device enabled+visible, to allow coolstar's Windows drivers for USB4/Thunderbolt to attach. TEST=build/boot Win11 on google/drobit, install USB4/TB drivers, verify USB4/TB ports are functional for PD and data at USB4 speeds. Change-Id: I84a20cfaf7e077469f8361b3da3b031d9fd84134 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org>
2023-07-31ec/google/chromeec: Unhide GOOG0004 ACPI deviceMatt DeVillier
Set the ACPI status (_STA) for the EC ACPI to enabled+visible, to allow coolstar's Windows drivers for the EC and keyboard backlight to attach. TEST=build/boot Win11 on google/samus, install EC/kblight drivers, verify keyboard backlight control functional. Change-Id: I3e9578f1ef18b3bebb93a9ae2ae4e27bc38f648d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76790 Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-07-18{ec,mb}/system76: Replace color keyboard logicTim Crawford
System76 EC since system76/ec@9ac513128ad9 detects if the keyboard is white or RGB backlit via `RGBKB-DET#` at runtime. Remove the Kconfig for the selection and update the ACPI methods for the new functionality. Change-Id: I60d3d165a58e30d2afc8736c0eb64dd90c8227ca Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76152 Reviewed-by: Jeremy Soller <jeremy@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-15ec/google/chromeec: Split wait-loop for DP and HPD flagsKapil Porwal
Split wait-loop for DP and HPD flags as below - - google_chromeec_wait_for_hpd - google_chromeec_wait_for_dp_mode_entry BUG=b:247670186 TEST=Verify display over TCSS and its impact on boot time for google/rex Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: I3e565d6134f6433930916071e94d56d92dc6cb06 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76370 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-15ec/google/chromeec: Call `wait_for_dp_hpd` only in AP mode entryKapil Porwal
Wait for DP/HPD flags only in AP initiated mode entry BUG=b:247670186 TEST=Verify display over TCSS and its impact on boot time for google/rex Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: I5137c346fbf1edabc60a53e0978e32f54885c330 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76369 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-15ec/google/chromeec: Skip TCSS `wait_for_connection` for AP mode entryKapil Porwal
Skip TCSS `wait_for_connection` for AP initiated mode entry. BUG=b:247670186 TEST=Verify display over TCSS and its impact on boot time for google/rex Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: Ia04ff470961831237fe851f7ae3feaa5623d4b4a Reviewed-on: https://review.coreboot.org/c/coreboot/+/76368 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-07-15ec/google/chromeec: Skip unnecessary call to TCSS `enter_dp_mode` cmdKapil Porwal
Skip TCSS `enter_dp_mode` command when there is no USB device detected on the port. BUG=b:247670186 TEST=Verify display over TCSS and its impact on boot time for google/rex Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: Ie6cd84cab3631596d4d7178dae2040e25c621f63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76352 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-07-03ec/system76/ec: Do not call reset on wakeTim Crawford
Resetting the device will cause the keyboard backlight and airplane LED to lose their state. Change-Id: I2f46542fb6b32c479b01335149c9190f6fa1421f Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75275 Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-by: Jeremy Soller <jeremy@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-23commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious
The prefix POSTCODE makes it clear that the macro is a post code. Hence, replace related macros starting with POST to POSTCODE and also replace every instance the macros are invoked with the new name. The files was changed by running the following bash script from the top level directory. sed -i'' '30,${s/#define POST/#define POSTCODE/g;}' \ src/commonlib/include/commonlib/console/post_codes.h; myArray=`grep -e "^#define POSTCODE_" \ src/commonlib/include/commonlib/console/post_codes.h | \ grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`; for str in ${myArray[@]}; do splitstr=`echo $str | cut -d '_' -f2-` grep -r POST_$splitstr src | \ cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g"; grep -r "POST_$splitstr" util/cbfstool | \ cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g"; done Change-Id: I25db79fa15f032c08678f66d86c10c928b7de9b8 Signed-off-by: lilacious <yuchenhe126@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76043 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-05-26ec/purism,system76: Provide probe for fixed Librem-EC jack detectJonathon Hall
Provide system76_ec_cmd() to send arbitrary commands to the EC. Provide librem_ec_has_jack_detect() to probe for the jack detect fix. Change-Id: Ic7bda0ce230a3ad68dfeb7b01a0e04f70dab9e5d Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74390 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Crawford <tcrawford@system76.com>
2023-05-17ec/google/chromeec/ACPI: Set TBMC status based on motion sensor presenceMatt DeVillier
Use ECRAM field MTNS to determine if motion sensor present, and set TBMC device status accordingly. TEST=build/boot google/{jinlon,drobit}, verify ACPI status for TMBC correct for both devices with and without tablet mode. Change-Id: Ic06ab6d721f0a3435e6dfd7b5e130f378096afec Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75172 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-05-16ec/google/chromeec: Use host command APICaveh Jalali
Update the chromeec driver to use the EC host command API. Large blocks of repetitive code to set up EC calls are replaced with single function calls to perform the same operation. BUG=b:258126464 BRANCH=none TEST=booted on rex Change-Id: I0317405b1ed0c58568078133c17c8cfbc7c21d80 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73325 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-16ec/google/chromeec: Add ec_cmd_api.h, update ec_commands.hCaveh Jalali
The new util/chromeos/update_ec_headers.sh utility is used to update ec_commands.h and introduce ec_cmd_api.h from the chrome EC repo. ec_cmd_api.h is a new file from the chrome EC repo which defines the API for communicating with the EC. It is a companion to the existing ec_commands.h by defining functions corresponding to EC host command opcodes and request/response struct definitions. See $EC/docs/ec-host-command-api.md for details. Generated using update_ec_headers.sh [EC-DIR]. The original include/ec_commands.h version in the EC repo is: 3e35858003 ec: Add another #line directive The original include/ec_cmd_api.h version in the EC repo is: 59de61f2db zephyr: Add support for RNG devices BUG=b:258126464 BRANCH=none TEST=none Change-Id: I30f20e34d31b7e19cf03f65fefd58ae64eef1d41 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73324 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-13ec/quanta/ene_kb3940q/acpi: Fix PS2K under WindowsMatt DeVillier
Add _HID to parent SIO device so Windows can find the PS2K, and remove _ADR since HID and ADR are mutually exclusive. TEST=build/boot Win11 on google/butterfly, verify keyboard functional. Change-Id: I772ceef1b439cfd4e2740e53362bee9d494fb36d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-05-07ec/google/chromeec: Handle ACPI S4 in chromeec_smi_sleep()Kyösti Mälkki
While Chromebook hardware originally would not have the capacity to do suspend-to-disk (ACPI S4), the power management code in EC should react to S4 request as if it was S5 request. Change-Id: Ida9118919c8149d94f470847d0c4aad9c0b97d3e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2023-05-03ec/starlabs/merlin: Change the fallback value for fn_ctrl_swapSean Rhodes
Change the fallback value of the `fn_ctrl_swap` option to 0, which is disabled. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I76329ec59ba630c987a122bffb8045150facdf08 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74916 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-04-28ec/starlabs/merlin: Change the fallback value for fn_ctrl_swapSean Rhodes
Change the fallback value of the `fn_ctrl_swap` option to 0, which is disabled. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9fcbb497f14ed0c97ff05c6c01a3929522786781 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-04-28ec/starlabs/merlin/acpi: Don't attempt to change EC valuesSean Rhodes
The EC will constantly update the battery variables approximately every 60 seconds; they should be used unmodified, rather than trying to change them. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3cff0ac6a322018cbca33b5f90dd62b3475da25c Reviewed-on: https://review.coreboot.org/c/coreboot/+/74186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-04-14ec/acpi/ec: replace misleading "recv_ec_data_timeout" console outputFelix Held
In the non-timeout case in recv_ec_data_timeout, a message like this one will get printed at BIOS_SPEW log level: "recv_ec_data_timeout: 0x00". The "timeout" part of the function name corresponds to what the function does, but the message will only be printed when not running into the timeout which is a bit misleading and might suggest a problem when there is none. To avoid this possible confusion, don't use the function name in the printk, but use "Data from EC:" instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I521f67517f64fc64e24853d96730c3f9459f1ccc Reviewed-on: https://review.coreboot.org/c/coreboot/+/74381 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-04-12Reland "drivers/intel/dptf: Add multiple fan support under dptf"Sumeet Pawnikar
This reverts commit 4dba71fd25c91a9e610287c61238a8fe24452e4e. Add multiple fan support for dptf policies. This also fixes the Google Meet resolution drop issue as per b:246535768 comment#12. When system starts Google Meet video call, it uses the hardware accelerated encoder as expected. But, as soon as another system connects to the call, an immediate fallback is observed from hardware to software encoder. Due to this, Google Meet resolution dropped from 720p to 180p. This issue is observed on Alder Lake-N SoC based fanless platforms. This same issue was not seen on fan based systems. With the fix in dptf driver where fan configures appropriate setting for only fan participant, not for other device participants, able to see consistent 720p resolution. BUG=b:246535768,b:235254828 BRANCH=None TEST=Built and tested on Alder Lake-P Redrix system for two fans support and on Alder Lake-N fanless systems. With this code change Google Meet resolution drop not observed. Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Change-Id: Id07d279ff962253c22be9d395ed7be0d732aeaa7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73249 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-12ec/google/chromeec: Use either EC or MB lid switch stateKarthikeyan Ramasubramanian
With CB:16732, EC can provide default lid switch implementation(LID0 ACPI device). Up until that point, mainboard has been providing default switch implementation. When EC provides lid switch implementation, the lid switch state is read from EC either through MMAP or LPC interface. Hence there is no need to keep mainboard's LIDS ACPI object in sync with EC's lid switch state. Use only EC's lid switch state on boards using EC's implementation. This paves the way to remove LIDS ACPI object on those mainboards. BUG=None TEST=Build Skyrim BIOS image and boot to OS. Trigger lid open/close events and ensure that they are detected properly through /proc/acpi/button/lid/LID0/state. localhost ~ # cat /proc/acpi/button/lid/LID0/state state: open localhost ~ # cat /proc/acpi/button/lid/LID0/state state: closed Ensure that the system behaves as expected based on powerd configuration. After signin, system suspends/resumes for lid close/open. On signin screen, system shuts down/boots for lid close/open. Change-Id: I013574d7c21761f167ad38aeed27a419677b8000 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Tim Van Patten <timvp@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-04-08ec/lenovo/pmh7/chip.h: Use 'bool' instead of 'int'Elyes Haouas
This to fix following error using Clang-16.0.0: /cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:135:22: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] .backlight_enable = 0x01, ^~~~ /cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:136:23: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] .dock_event_enable = 0x01, ^~~~ Change-Id: Icd35224877fee355e1bbb8a8e838cb047604babb Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-04-04ec/starlabs/merlin: Add support for the ITE mirror flagSean Rhodes
When enabled, the EC will mirror the firmware contained inside the coreboot ROM. This allows it to be updated at the same time as coreboot. Enable the mirror flag if the installed EC firmware does not match the target version or if a CMOS option, "manual_mirror_flag" is set. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I377abbb37dc4d3e535e518a73e73969b25967daa Reviewed-on: https://review.coreboot.org/c/coreboot/+/73044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-03-09Revert "ec/starlabs/merlin: Add support for enabling the mirror flag"Sean Rhodes
This reverts commit b42ca4d0b2fafe7214396d30a1a833ac33cf85bc. Reason for revert: The mirror flag "0x01" is mirror once, which relies on the EC remembering that it's been mirrored. However, the EC forgets this if it's been without power for 20 minutes or so. Even if power is connected then, it'll instantly try to mirror and it can't charge whilst doing it. It can either result in incomplete EC firmware, or a loop where it's constantly trying to mirror. Change-Id: I79da9143cc63459e7e29431eff2cb14200424b37 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-03-04{ec,mb}/system76: Move smbios_system_wakeup_typeTim Crawford
Move the implementation of smbios_system_wakeup_type from the mainboards to the EC for all models that use System76 EC (everything except KBL). Change-Id: Iaace234ca87e8a05eaa006a438d2c9eb13ce4d76 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
2023-03-02acpi/ec: Handle new host event EC_HOST_EVENT_BODY_DETECT_CHANGETim Van Patten
Handle the new host event EC_HOST_EVENT_BODY_DETECT_CHANGE. Previously, the EC sent the host event EC_HOST_EVENT_MODE_CHANGE when body detection changed between lap/desk mode. However, that event is a wake event, which resulted in spurious AP wake events being triggered when the EC detected lap/desk mode changes while the AP was suspended. To resolve this, the new host event EC_HOST_EVENT_BODY_DETECT_CHANGE was added, which will not be a wake event. This CL adds handling for the new event to acpi/ec.asl to switch DPTC tables when a change is detected. BRANCH=none BUG=b:261141172 TEST=bodydetectmode on|off, verify host event is received Change-Id: Iabeb7891489a209f45504804355f1fa817082976 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73298 Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2023-02-27ec/google/chromeec: Update ec_commands.hTim Van Patten
Update ec_commands.h from the EC repo at: "8441cf4 Add host event: EC_HOST_EVENT_BODY_DETECT_CHANGE" This is an exact copy of the EC repo's ec_commands.h with the exception of updating the copyright message. BUG=b:261141172 BRANCH=none TEST=built coreboot for skyrim Change-Id: I9892c0c3518f63d357459861e8fa1b7f5f494e68 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73258 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
2023-02-19treewide: Remove useless "_STA: Status" commentElyes Haouas
Change-Id: I99ded00fa6dadb494c1523d00063dbc1fde95614 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73093 Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-17treewide: Remove unuseful "_UID: Unique ID" commentElyes Haouas
Change-Id: I150a4ed94bcaead6eb45f1c4b4952ae6957e0940 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-02-17treewide: Remove unuseful "_HID: Hardware ID" commentElyes Haouas
Change-Id: I5eb1424e9e6c1fbf20cd0bf68fbb52e1ec97f905 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-02-08ec/dell: Add support for the SMSC MEC5035Nicholas Chin
This is required to prevent the EC from shutting down the system after about 15 seconds after being turned on. If the EC doesn't receive a command meaning "CPU OK" it assumes that the processor has failed and flashes a diagnostic code on the keyboard LEDs to indicate this. This also enables the keyboard and trackpad/trackpoint interfaces. Parts of this code were derived from yet-to-be merged code in CB:44975 (ec: Add support for MEC5055 for Dell laptops) written by Iru Cai. Tested on a Dell Latitude E6400 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Change-Id: Ia420cd51e9a64be5eee4af2c0d113618575522b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59703 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-08ec/google/chromeec: Update ec_commands.hCaveh Jalali
Update ec_commands.h from the EC repo at: "8b6f7de2a7 fan: update fan stalled value reporting" This is an exact copy of the EC repo's ec_commands.h with the exception of updating the copyright message. BUG=b:258110734 BRANCH=none TEST=built coreboot for brya Change-Id: I4ce15e1af40cc54a6cf2ebd6f5d5adf8953dee60 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72640 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-02-08ec/google/chromeec: clang-format ec_commands.hCaveh Jalali
This is a format-only change: Reformat ec_commands.h using clang-format according to the EC repo's current formatting style. The command is: clang-format --style=file:$EC/.clang-format -i ec_commands.h where $EC points to the chromeos EC repo. The EC repo has recently adpoted the practice of formatting all files through clang-format using its own style. So, run ec_commands.h through the EC's clang-format so future updates don't get overwhelmed by inconsequential style changes. BUG=b:258110734 BRANCH=none TEST=built coreboot for brya Change-Id: Icbd6d00922dc5fd4c44ee109d54cea612e15db06 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-02-01ec/google/wilco/acpi: Add DPTF RCDP() methodMatt DeVillier
The Windows DPTF drivers expect this method, and if not present appear to hang. Adding this method fixes DPTF under Windows on drallion. Modeled after existing method used by chrome-ec. TEST=build/boot Win11 on google/drallion, verify DPTF functional. Change-Id: I6570345379da413273251ecf5209c4997aac9b11 Original-patch-by: Coolstar <coolstarorganization@gmail.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org>
2023-01-28ec/google/chrome-ec: Demote Vivaldi printk from error to infoMatt DeVillier
Not all Chrome-EC devices have a keyboard or use Vivaldi for key remapping, so demote the printk output when the EC doesn't support it from ERROR to INFO. Adjust the printk text for clarity. Change-Id: I14059f4e3e56ff891f302601d5acc1bb842cffc1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72474 Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-22ec/google/chromeec/acpi/ec: add scope comment to nested #endifFelix Held
To make the code slightly easier to read, add a comment about the scope to the #endif of the outer #ifdef block. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic2bc83c77750cd8a509f4755fdfa4daaf082d754 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
2023-01-11ec/google/chromeec: Add retimer flag for mux devicePrashant Malani
Not all ports have retimers. Add a property to denote that a particular port has a retimer (instead of assuming that all ports have retimers). BUG=b:263964979 TEST=Verified on guybrush; SSDT shows retimer-switch on port1 when device tree is updated accordingly. Change-Id: I754323236d2912777b63cede0fce2ccf7882cfea Signed-off-by: Prashant Malani <pmalani@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71663 Reviewed-by: Robert Zieba <robertzieba@google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-10chromeos/cr50_enable_update.c: Clear EC AP_IDLE flagDerek Huang
When AP boots up after Cr50 firmware update and reboot, AP finds that Cr50 reset is required for Cr50 to pick the new firmware so it trigger Cr50 reset and power off the system, AP expects system will power on automatically after Cr50 reset. However this is not the case for Chromebox, Chromebox EC set AP_IDLE flag when system is shutting down, when AP_IDLE flag is set in EC, the system stays at S5/G3 and wait for power button presssend. It cause an issue in factory that the operator needs to press power button to power on the DUT after Cr50 firmware update. This patch sends EC command to direct EC to clear AP_IDLE flag after AP shutdown so AP can boot up when Cr50 reset. BUG=b:261119366 BRANCH=firmware-brya-14505.B TEST=DUT boots up after Cr50 firmware update in factory test flow Change-Id: If97ffbe65f4783f17f4747a87b0bf89a2b021a3b Signed-off-by: Derek Huang <derekhuang@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70773 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-29{ec,mb}/system76/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ia5ae30a1ee976b8059936027b28ac56f37279217 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71516 Reviewed-by: Tim Crawford <tcrawford@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-27{superio,ec}/acpi: Replace constant "Zero" with actual numberFelix Singer
Change-Id: I449ec5b0bbf3f24d51688efef151d3018d2848b2 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71524 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-27{superio,ec}/acpi: Replace constant "One" with actual numberFelix Singer
Change-Id: I5c77b6d1e1dc1134f62dcb3e93df01dc9c2f386c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71520 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-26tree/acpi: Replace Divide(a,b,c,d) with ASL 2.0 syntaxFelix Singer
Replace `Divide (a, b, c, d)` with these instructions: c = a % b d = a / b Change-Id: I44366be5b5145a5d19f85df7a2f338866cb9c8b0 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-12-26tree/acpi: Replace Not(a) with ASL 2.0 syntaxFelix Singer
Replace `Not (a)` with `~a`. Change-Id: I53993fb7b46b3614d18ee001323f17efacbf04c1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71513 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-23tree: Replace And(a,b) with ASL 2.0 syntaxFelix Singer
Replace `And (a, b)` with `a & b`. Change-Id: Id8bbd1a477e6286bbcb5fa31afd1c7a860b1c7dc Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70851 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-23tree: Replace And(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `And (a, b, c)` with `c = a & b`, respectively `c &= b` where possible. Change-Id: Ie558f9d0b597c56ca3b31498edb68de8877d3a2f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70850 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-23tree: Replace Or(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Or (a, b, c)` with `c = a | b`, respectively `c |= b` where possible. Change-Id: Icf194b248075f290de90fb4bc4e9a0cd9d76ec61 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70846 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-23tree: Replace ShiftLeft(a,b) with ASL 2.0 syntaxFelix Singer
Replace `ShiftLeft (a, b)` with `a << b`. Change-Id: I812b1ed9dcf3a5749b39a9beb9f870258ad6a0de Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70842 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-23tree: Replace ShiftLeft(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `ShiftLeft (a, b, c)` with `c = a << b`. Change-Id: Ibd25a05f49f79e80592482a1b0532334f727af58 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70841 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-23tree: Replace ShiftRight(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `ShiftRight (a, b, c)` with `c = a >> b`. One case was simplified to just `a >> b`. Change-Id: I889012b0a3067138e6f02d3fe8e97151effb5c2a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70840 Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-19tree: Replace Or(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Or (a, b)` with `a | b`. Change-Id: I73842cd4843ebb0b48440059ae9dcf6c82235a76 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70845 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-12-19tree: Replace XOr(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `XOr (a, b, c)` with `c = a ^ b`, respectively `c ^= b` where possible. Change-Id: Ic5f67684bbd4ea115c4dae8a4417d88bea0d6b77 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70843 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-12-19ec/starlabs/merlin: Add EC related files for Cezanne laptopsSean Rhodes
Add EC memory layout and Q events for AMD Cezanne based boards, the "StarBook Mk VI" and "StarFighter Mk I", which both use the ITE 5570E. Change-Id: I87806b830b3d58a6ce3b89f45b5a07f4502a87f3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68333 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-16ec/kontron/it8516e/acpi: Replace Store(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Store (a, b)` with `b = a`. Change-Id: I16890206d517f0455d29c1642cbbe642a3312481 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70679 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-15treewide: Remove unused 'include <arch/io.h>'Elyes Haouas
Change-Id: I6f1d7625eb457084ba893b25518fdfdb59cf64db Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70693 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-12-14ec/smsc/mec1308/acpi: Replace Store(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Store (a, b)` with `b = a`. Change-Id: I0a419c861e84cd96e8337957dc62a7ca5b981e14 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70640 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-14ec/quanta/acpi: Replace Store(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Store (a, b)` with `b = a`. Change-Id: I00a6ece73048209861221cba5f2c7381adfa54b9 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-14ec/google/chromeec/acpi: Replace Store(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Store (a, b)` with `b = a`. Change-Id: I2cdb1c9ae3a33bfc72767ff60d8948054d4e151a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-14ec/lenovo/h8/acpi: Replace Store(a,b) with ASL 2.0 syntaxFelix Singer
Replace `Store (a, b)` with `b = a`. Change-Id: I1c68816f47aa3ed0ab3bf55d4cfde71d5838d051 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70637 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-12ec/lenovo/h8/acpi: Replace LLessEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLessEqual (a, b)` with `a <= b`. Change-Id: I76855f9d4564fc08cd70456e2a0b1514cd73e35f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70620 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-12ec/clevo/it5570e/acpi: Replace Index(a, b) with ASL 2.0 syntaxFelix Singer
Replace `Index (FOO, 1337)` with `FOO[1337]`. Change-Id: If035eac6b6eb06f79eb6596364bc41069ba42f70 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70532 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-12ec/purism/librem-ec/acpi: Use Printf() for debug printsFelix Singer
Change-Id: Ie29511ad0b8e24feb478152009d7f4e8ed3ad26d Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
2022-12-09mb/intel/mtlrvp: Add MTL-P RVP board idsJamie Ryu
This adds MTL-P board id definition. Change include, 1. Add board_id.c implementation 2. Add board_id.h implementation 3. Add board_id config in variants.h 4. Makefile changes BUG=b:224325352 TEST=Able to build with the patch and boot the mtlrvp platform with the subsequent patches in the train Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Change-Id: I90b0543d5db208f696d2c2c2dc3d2581514a845b Signed-off-by: Harsha B R <harsha.b.r@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66102 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Usha P <usha.p@intel.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-12-06src/ec/intel: Create common code for board_id implementationHarsha B R
This patch creates initial common code structure for board_id implementation for intel rvp platforms. Board_id helps in identifying the platform with respect to CHROME_EC and INTEL_EC (Windows_EC). Changes include 1. Create initial board_id.c and board_id.h 2. Modify the Makefile to include src/ec/intel directory BUG=b:260654043 TEST=Able to build with the patch and boot the mtlrvp platform with the subsequent patches in the train Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: If133f6a72b8c3e1d8811a11f91e4556beb8c16e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70227 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Usha P <usha.p@intel.com> Reviewed-by: Subrata Banik <subratabanik@google.com>