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2022-10-07ec/starlabs/merlin: Add EC related files for Alder Lake boardsSean Rhodes
Add EC memory layout and Q events for Intel Alder Lake based boards, the "StarBook Mk VI" and "StarFighter Mk I", which both use the ITE 5570E. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8cea386ba91d076084002738fe7041834deea311 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-06ec/starlabs/merlin: Add support for enabling fast chargeSean Rhodes
The Lite Mk IV's can enable fast charging, with support up to 100W via USB-C PD 3.0. The default for this is disabled, as it can reduce battery life span. This patch adds the option to enable fast charging, by writing 0x01 to 0x18 in the EC space. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie01eb59d3f41b242190973fd9c58b1494320c12a Reviewed-on: https://review.coreboot.org/c/coreboot/+/66298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-05ec/lenovo/h8/acpi: Fix wrongly used operatorFelix Singer
Commit 37a89d519d4e ("ec/lenovo/h8/acpi: Replace Not() with ASL 2.0 syntax") mixed up boolean and bit-wise operators while replacing Not() with ASL 2.0 syntax. Thus, fix that. Built dsdt.aml of lenovo/x230 and differs, but it remains the same when this commit is applied after commit 37a89d519d4e. Change-Id: Ifa848aafb5480acaac4fabffcf90a3dbf5248e43 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66380 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-27ec/lenovo/h8: Add Kconfig option for Fn-Ctrl swapAngel Pons
Having to use a runtime configurable option backend like CMOS just to specify the value of the "fn_ctrl_swap" option is annoying. Introduce a new Kconfig option to allow specifying the fallback value, which is only used when the option backend cannot provide a value. Change-Id: I00bb3cd60c443fc0c8adb82e8e0c436dfc5de24b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67836 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-09-14timer: Change timer util functions to 64-bitRob Barnes
Since mono_time is now 64-bit, the utility functions interfacing with mono_time should also be 64-bit so precision isn't lost. Fixed build errors related to printing the now int64_t result of stopwatch_duration_[m|u]secs in various places. BUG=b:237082996 BRANCH=All TEST=Boot dewatt Change-Id: I169588f5e14285557f2d03270f58f4c07c0154d5 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66170 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-09-05ec/google/chromeec: Modify ufp from type-c roleDtrain Hsu
In order to fix the USB port of type-C dongle has no function after reboot/shutdown, modify ufp which is in google_chromeec_usb_pd_get_info from the bit1 of type-c role (PD_CTRL_RESP_ROLE_DATA). BUG=b:239138412 TEST=Built coreboot image and verified that using this patch can detect usb drive after reboot. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I73a4a6ec37129388783599125f067068d155d93f Reviewed-on: https://review.coreboot.org/c/coreboot/+/67168 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-04drivers/intel/dptf: Add multiple fan support under dptfSumeet Pawnikar
Add multiple fan support for dptf policies BUG=b:235254828 BRANCH=None TEST=Built and tested on Redrix system for two fans Change-Id: I96ead90e3b805bd20de03e4bef4fa4b9fbaaaedd Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65611 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-08-31acpi: Replace EC_ENABLE_AMD_DPTC_SUPPORT with Kconfig valueTim Van Patten
Compile-time support of DPTC is controlled by EC_ENABLE_AMD_DPTC_SUPPORT in each variant's ec.h file. This CL removes EC_ENABLE_AMD_DPTC_SUPPORT and replaces it with the Kconfig value SOC_AMD_COMMON_BLOCK_ACPI_DPTC. Each variant's run-time support of DPTC continues to be controlled by the variant's overridetree.cb "dptc_enable" value. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Boot skyrim Signed-off-by: Tim Van Patten <timvp@google.com> Change-Id: Ic101e74bab88e20be0cb5aaf66e4349baa1432e3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67180 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-08-26ec/google/chromeec: Call PNOT() when Battery Status ChangesTim Van Patten
PNOT() should be called when the battery status changes, to give the SOC an opportunity to handle it. This is in preparation for the low/no battery boot changes. This CL also updates the PNOT() comments to better match the name of the function and why it's called. BRANCH=none BUG=b:217911928 TEST=Boot skyrim Change-Id: I8b74313d242fd4959315a67579eb6c5f49a31a76 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66993 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
2022-08-26ec/starlabs/merlin/cml: Correct the offset for Max ChargeSean Rhodes
The offset for Max Charge is located at 0x1a, so correct this in the definitions and EC memory ACPI. Change-Id: I92cc452d1189e62db78aed787f2de65fd5096564 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-24ec/google/chromeec/acpi: Add support for DPTF oem variable event notifyTony Huang
The agah EC code will monitor adapter current to choose corresponding DPTF oem variable table. When it changes, this event will send to the ACPI FW through host event and then pass onto the DPTF kernel driver. This patch adds support for that feature. BUG=b:238921409 TEST=add Printf() calls to the ACPI, and check these Printf() will show up in the kernel log when EC send oem variable table change notify. Change-Id: I1dbbfd9b3d65b56d77050c9ba9957e54530c3a0e Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66574 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-18ec/google: Notify DPTF driver power participant on PD eventVarshit B Pandya
The DPTF power participant device needs to be notified when power source changes so it can re-evaluate power source and power source change count, this can be later used by DPTF along with methods provided by EC. Corresponding changes in EC are https://crrev.com/c/3545778 and https://crrev.com/c/3547317 BUG=b:205928013 TEST=Build, boot brya0 and dump DSDT to check change Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com> Change-Id: I07f58b928a0dba92bec3817177142c586e5014b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2022-08-17ec/google/chromec: Add BFIV, BFCTTim Van Patten
The flag EC_BATT_FLAG_CUT_OFF was added with the CL: 3704470: battery: Set battery cutoff flag https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3704470 This flag is set in the ACPI memory mapped area when the command `ectool batterycutoff` is issued so ACPI code can respond appriopriately. This CL adds the flags to coreboot ACPI. BRANCH=none BUG=b:217911928 TEST=Boot nipperkin with low & no battery TEST=Boot skyrim with low & no battery Signed-off-by: Tim Van Patten <timvp@google.com> Change-Id: I4e63ff4fc2d6b0ecf767a6bffd81f823c74c15bb Reviewed-on: https://review.coreboot.org/c/coreboot/+/66803 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-16ec/system76/ec: Provide charging thresholds by defaultTim Crawford
Battery charging thresholds are a firmware implementation and not dependent on any hardware. It is expected that all boards using System76 EC firmware will select this option, so enable it by default. Leave it disabled on clevo/cml-u, which didn't have it selected. Change-Id: Id99d36eaf055a76b9e1eb732174017651de299a5 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65714 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-07-14commonlib: Substitude macro "__unused" in compiler.hBill XIE
Since there are many identifiers whose name contain "__unused" in headers of musl libc, introducing a macro which expands "__unused" to the source of a util may have disastrous effect during its compiling under a musl-based platform. However, it is hard to detect musl at build time as musl is notorious for having explicitly been refusing to add a macro like "__MUSL__" to announce its own presence. Using __always_unused and __maybe_unused for everything may be a good idea. This is how it works in the Linux kernel, so that would at least make us match some other standard rather than doing our own thing (especially since the other compiler.h shorthand macros are also inspired by Linux). Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: I547ae3371d7568f5aed732ceefe0130a339716a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-07-13ec/google/chromec: Update ACPI handlers for GPUTim Wawrzynczak
There is a new field in EC EMEM for arbitrary GPU data to be passed from EC to ACPI FW; this patch adds support for it. Also the current host event for _Q0C (EC_HOST_EVENT_USB_CHARGER) is unused, and is being repurposed in the next CL, so this patch drops the handler. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Iff6f935a5bdc8c47277eaa6bcbedd5fc5ed311a4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65485 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-09ec/system76/ec: Hide ACPI device S76DJeremy Soller
Hide the device so that Windows does not warn about a missing driver. Tested on system76/lemp10: - EC functionality remains functional on Linux 5.18.6 and Windows 10. - Windows 10 does not report the device in Device Manager. Change-Id: Iffcb873b85e077535d4de5806d01ba309f46c017 Signed-off-by: Jeremy Soller <jeremy@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64700 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-04treewide: Unify Google brandingJon Murphy
Branding changes to unify and update Chrome OS to ChromeOS (removing the space). This CL also includes changing Chromium OS to ChromiumOS as well. BUG=None TEST=N/A Change-Id: I39af9f1069b62747dbfeebdd62d85fabfa655dcd Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65479 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-30ec/google/chromeec: Update ec_commands.hYu-Ping Wu
This change copies ec_commands.h directly from the ChromiumOS EC repo, with the exception of changing the copyright header to SDPX format. Update to commit SHA1 2cbf6fbf (ec_commands: Drop VBNV read/write support). BUG=b:178689388 TEST=none BRANCH=none Change-Id: I74fa8b1171ca109dee163a7657659cdac1687450 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65469 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-24ec/google/chromeec: Remove google_chromeec_vbnv_context()Yu-Ping Wu
With CB:65012, google_chromeec_vbnv_context() is no longer used. Remove it from the codebase. BUG=b:178689388 TEST=./util/abuild/abuild -t GOOGLE_STOUT -a -x Change-Id: I717f600f0f73c3ca932b6a442a9d5b90c35c8f3b Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-24device/resource: Modify some resource allocation instancesKyösti Mälkki
These changes made my crude pattern matching work with coccinelle simpler. Change-Id: I83f3ef38b8663640594b4d726838f7a6f96a58a2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64698 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-06-24ec/acpi: Return error codes on timeoutAbel Briggs
The `send` and `recv` API functions currently print error messages if a timeout occurs while polling the EC, but they perform the I/O transaction regardless. This can put the EC in a bad state or otherwise invoke undefined hardware behavior. Most callers ignore the return value currently, but for callers which do not, we should make sure our behavior is correct. Signed-off-by: Abel Briggs <abelbriggs1@hotmail.com> Change-Id: Ifb87dd1ac869807fd08463bd8fef36d0389b325e Reviewed-on: https://review.coreboot.org/c/coreboot/+/64350 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-22ec/lenovo/pmh7: Add IORESOURCE_ASSIGNED flagKyösti Mälkki
This makes coccinelle script happy, everyone else sets flags last. Change-Id: I80f421aeacb6e72fea2265c69cafb2a0d89e5616 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-06-22ec/kontron/kempld: Fix IORESOURCE_IRQKyösti Mälkki
The IRQ was incorrecly allocated as IO resource. It's not possible for new_resource() to return NULL. Change-Id: I66811b36b44f06cb39df8e9cdab87be0e2ef8eb9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-06-15ec/google/chromeec: Add property to denote mux mode switchPrashant Malani
On some systems, the Chrome EC controls both the USB Type-C mux as well as the retimer. Introduce a boolean property "mode-switch" to denote switches which act as a mode-switch. BUG=b:235834631 TEST=None BRANCH=None Signed-off-by: Prashant Malani <pmalani@chromium.org> Change-Id: If209a8529ff7ec424f23fd96875ac95a1fe6267d Reviewed-on: https://review.coreboot.org/c/coreboot/+/65116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-10ec/google/chromeec: Add support to report fan speed via ACPISumeet Pawnikar
Add fan speed rpm control for DPTF based Active2 policy as per document #626708, by utilizing existing FAN0 variable from src/ec/google/chromeec/acpi/emem.asl#18. There is no corresponding EC change required for this policy support because EC fan code already exporting this rpm value using EC_MEMMAP_FAN for FAN0. BUG=b:224457192 BRANCH=None TEST=Built and booted on ADL-P based Brya system and verify the fan speed in rpm under sysfs path cat /sys/bus/acpi/devices/INTC1048\:00/fan_speed_rpm. Change-Id: Ibb1646b1fb1659fd853ece97d97bb9dee2a3f57e Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-09ec/lenovo/h8/acpi: Replace Not() with ASL 2.0 syntaxFelix Singer
Change-Id: I8a0f18d37c065827a0f5b54f24ea1fcde497c504 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/lenovo/h8/acpi: Replace And() with ASL 2.0 syntaxFelix Singer
Change-Id: Id600bcb3fad35455adffe11a8105ad2590e83feb Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60723 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/lenovo/h8/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Multiply (a, b, c)` with `c = a * b`. Change-Id: Idfc08803946cc2d4537db4be8d1bc07e48aa6fed Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60646 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/smsc/mec1308/acpi: Replace LLessEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLessEqual(a, b)` with `a <= b`. Change-Id: Ib4e81ea95c6fda0e8f8640671db5ce56f3a1b474 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60707 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/smsc/mec1308/acpi: Replace LGreater(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreater(a, b)` with `a > b`. Change-Id: I04f3cc2dbba59d732c9c52a4b90a32481f9da337 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/smsc/mec1308/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LNotEqual(a, b)` with `a != b`. Change-Id: Ib34dc8d84815d0885f30b3ea8ceb2fb95a833d50 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/smsc/mec1308/acpi: Replace LLess(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLess(a, b)` with `a < b`. Change-Id: Ib96cf05f575a2868b2ad0c00fd5486d6e2c5d90a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/it8518/acpi: Replace LGreater(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreater(a, b)` with `a > b`. Change-Id: I86a11ab5d2667661af3491174001001e644083e3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60685 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/smsc/mec1308/acpi: Replace LGreaterEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreaterEqual(a, b)` with `a >= b`. Change-Id: If83d7fe29d112ba0ed0f72798f2b5436ecf0a6a2 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60689 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/it8518/acpi: Replace LLess(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLess(a, b)` with `a < b`. Change-Id: Ief1fe60116645d0cdad9e7ac600bc1062b54b40d Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/smsc/mec1308/acpi: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LEqual(a, b)` with `a == b`. Change-Id: Ic58e22046aa13549747692f4b21184cf573aa4d3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/it8518/acpi: Replace LGreaterEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreaterEqual(a, b)` with `a >= b`. Change-Id: I99cc4cf08ad74f2cb84e0ad16e615e03bbf388af Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60691 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/it8518/acpi: Replace Divide(a,b,,c) with ASL 2.0 syntaxFelix Singer
Replace `Divide (a, b, , c)` with `c = a / b`. Change-Id: I9b8262396755197dfbe044e3dc6a6a75c903f093 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60654 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/it8518/acpi: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LEqual(a, b)` with `a == b`. Change-Id: I6732fd876524feab924a58434bec381dcdb87bce Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/it8518/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Multiply (a, b, c)` with `c = a * b`. Change-Id: Ied407753ee3bb024c8c0350c45312c337ac799e5 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/quanta/ene_kb3940q/acpi: Replace LLess(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLess(a, b)` with `a < b`. Change-Id: Ic04ce82fbfd36bbd2e0cfda1a92ca0a18e1fcd73 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/kontron/it8516e/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Multiply (a, b, c)` with `c = a * b`. Change-Id: I81e976de964f6ae3528884debaf2b24ddf8ed28a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60648 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/google/chromeec/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LNotEqual(a, b)` with `a != b`. Change-Id: I2e0c5961fcc90c97666f49837a71f6c0bdc429b3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/lenovo/h8/acpi: Replace LLessEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLessEqual(a, b)` with `a <= b`. Change-Id: I256e56841e1c7037fe8ba5e9a963ad2301092325 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/lenovo/h8/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LNotEqual(a, b)` with `a != b`. Change-Id: Ic114e097a08488106554ce2dec61fa219d7cf1d0 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/lenovo/h8/acpi: Replace LGreater(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreater(a, b)` with `a > b`. Change-Id: I1dbe6c325ed33a4dd15e4d6315b2308d8351974e Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-09ec/lenovo/h8/acpi: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LEqual(a, b)` with `a == b`. Change-Id: I49a7ed2d57124746815478f3ead8a8f7c54d048a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
2022-06-03ec/google/chromeec/acpi: Replace LGreater(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreater(a, b)` with `a > b`. Change-Id: Ie6238ead464d79b3576846f3b5b92b658972eec8 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-03ec/acpi: Rework to reduce code duplicationAbel Briggs
- Move EC send/receive polling code to their own functions - Add named constants for poll timeouts and delay interval - Use human-readable timeout values - Add `send`/`recv` functions which support custom timeouts - Remove extra 10us delays between polling and performing a given transaction - Use constants from `ec.h` for standard EC command opcodes Tested on a Lenovo Edge E530, which takes similar code paths to the Lenovo Twist S230u. Change-Id: Ifda5c030ff81f1046be58aa1fcafdcf71a27cd41 Signed-off-by: Abel Briggs <abelbriggs1@hotmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2022-06-03ec/google/chromeec/acpi: Replace Multiply(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Multiply (a, b, c)` with `c = a * b`. Change-Id: Iea86e77df6c76756ed336f57a906ac0757aef1cf Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-03ec/google/chromeec/acpi: Replace Divide(a,b,,c) with ASL 2.0 syntaxFelix Singer
Replace `Divide (a, b, , c)` with `c = a / b`. Change-Id: I26117087c09109cfc480cbe01d3761a02a12c61b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-03ec/google/chromeec/acpi: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LEqual(a, b)` with `a == b`. Change-Id: I4d79080ecfe457766983b20a0217ccadcd188fcf Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60662 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-03ec/google/chromeec/acpi: Replace LLess(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LLess(a, b)` with `a < b`. Change-Id: I65225a890f9085574a2295e6ccd2cdc3e84f71e0 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60670 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-06-03ec/google/chromeec/acpi: Replace LGreaterEqual(a,b) with ASL 2.0 syntaxFelix Singer
Replace `LGreaterEqual(a, b)` with `a >= b`. Change-Id: I72875f68e143f9384c91588cd453d2987fda526d Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60690 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-05-28ec/starlabs/merlin/kbl: Add required headers for dead_code_tSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia6c3ba80d5e6ac3d4fd8a935732ef7e32cf33998 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64718 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-28ec/starlabs/merlin/glk: Add Trackpad enable/disable Q eventsSean Rhodes
Add Q60 and Q61 events to disable or enable the trackpad. The support for this Q event was added in Star Labs EC version 1.11 Add Q events Q60 and Q61 which are bound to the F10 key. The event is select based on the value of 0x14, 0x11 will send Q60 and 0x22 will send Q61. Q60 will pull GPIO_177 to low, consequently disabling the trackpad and Q61 will reset it to the default configuration. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I091b0eb268d4d6d2109559765be71e2746b85f54 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-05-25ec/starlabs/merlin/glk: Correct offset of USCISean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I54b01b1974822c155cb49634fff8616326d55705 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-05-16rules.h: Use more consistent namingArthur Heymans
Use 'ENV' consistently and drop the redundant 'STAGE' in the naming. Change-Id: I51f2a7e70eefad12aa214e92f23e5fd2edf46698 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64296 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-05-12ec/starlabs/merlin: Remove offset for Max Charge when not supportedSean Rhodes
Set the MAX_CHARGE offset to dead_code_t for boards that don't support the function. The avoids erroneous values being written to the EC. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I306c8a60818b780ef3bfb842e7fcc4d8500d6b03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64092 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-05-04ec/google/chromeec: Add retimer handle to Type C connPrashant Malani
Some platforms have retimers which can be configured via the EC. Add a handle to these retimer devices to the Type C connector device, using devicetree references. BUG=b:208883648 TEST=Verify disassembled SSDT on brya. BRANCH=None Signed-off-by: Prashant Malani <pmalani@chromium.org> Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63793 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-05-04ec/google/chromeec: Add EC Mux devicePrashant Malani
Introduce an EC Mux ACPI device, which will control retimer and discrete (off-AP) mux configuration. BUG=b:208883648 TEST=None BRANCH=None Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8 Signed-off-by: Prashant Malani <pmalani@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-05-03lenovo: correct typo in macro H8_HAS_BAT_THRESHOLDS_IMPLPeter Lemenkov
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Change-Id: Ia0550a115d75183cd72e478ae739731001febe22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-27ec/google/chromeec: Add empty string check for OEM stringEric Lai
If set OEM string as "", it shows "Not Specified" with dmidecode. Use default string if it is empty. BUG=b:230039300 TEST=set OEM string "" and show google with dmidecode -t 2. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I097e1be696ae974aadc47feb8d0c1dae672a5c82 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63772 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-04-24ec/purism/librem: Remove unused Kconfig fileElyes Haouas
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I0d8dff53d98ae70b72d1850d18fd6408d3293356 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62363 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-20ec/google/chromeec: Drop `_PRS` from static devicesAngel Pons
The `_PRS` ACPI object is not needed for static (non-configurable) devices. For devices where `_CRS` always provides the same set of resource settings, drop the `_PRS` object. Note that every dropped `_PRS` object only provides one set of resource settings, which is identical to the resource settings provided by the `_CRS` object. Change-Id: Ief40e790fdee336fd6c786e18cd01c41fa658c2c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-07ec/google/chromeec: Initialize device_path subidAkihiko Odaki
Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com> Change-Id: I910998a5555319cf9840493a31df4934054e08ce Reviewed-on: https://review.coreboot.org/c/coreboot/+/63384 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-04-06ec/starlabs/merlin: Add EC related files for Cezanne boardsSean Rhodes
Add EC memory layout and Q events for AMD Cezanne based boards, "Byte" and "Fighter", which both use the ITE 5570E. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3f837263d24e6b642cf33fd2995d8c90529706f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62994 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-06ec/starlabs/merlin: Correct Q event for CPU DN SPEEDSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ieea1c8d0923f6ea6b13cf76525c9c4c686a92c40 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-04-04ec/starlabs/merlin: Remove comment about OPWESean Rhodes
OPWE offset didn't exist, but it does now so remove the comment about this. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I4a1310c779002dfb00d01a22437ea223bb406609 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-30ec/starlabs/merlin: Add GLKR variantSean Rhodes
Add GLKR (N5030) Lite Mk IV variant Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1e17130caa16a605d0d3207d41527df3db6ada81 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62705 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-30ec/starlabs/merlin: Add support for Nuvoton EC'sSean Rhodes
Support was created for the NPCE9m5x series, using version 1.1 of the datasheet. The specific model tested was the NPCE985P/G, on the StarLite Mk IV with version 1.00 of the EC firmware. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ib66baf1e88f5d548ce955dffa00c9b88255b2f95 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-03-30ec/starlabs/merlin: Make EC function names genericSean Rhodes
Rather than using `ite_`, use `ec_` so the same functions can be called for different ECs. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie61af233f731eb47772af1c82c6abdc515bc89cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/62700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-30ec/starlabs/merlin: Rename ec.c to more specific ite.cSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I0bac5e4c101792dd4c6a0d4a1ae4a4c7fcd837d5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62677 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-21ec/starlabs/merlin: Don't store EC values on changeSean Rhodes
Since CB:62741, the EC values are backed up to the CMOS when entering S3, S4 and S5. Consequently, they don't need to be stored when they're changed. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: If0ea392afae4a4d3c605cdea3c5896fbff606215 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62742 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-21ec/starlabs/merlin: Always store EC valuesSean Rhodes
The EC values will be changed when entering S3, S4 or S5, so move the function that stores the current settings outside of logic that restricts it to S4 or S5. This means the state isn't lost when entering S3. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-03-17ec/google/chromeec: Change loglevel prefixWisley Chen
In most boards, it doesn't write OEM_NAME in CBI to override the manufacturer name in the SMBIOS table. It' better use the "BIOS_INFO" than "BIOS_ERR" BUG=b:222038287 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot Change-Id: I52eb1e6926eaac30b1dbee13ab750ef15b466d89 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-17ec/chromeec/ec_smbios: Set system manufacturer for ChromeOS devicesMatt DeVillier
Currently, many Linux drivers use DMI quirks to identify ChromeOS devices and handle them accordingly: namely they look for the SMBIOS system manufactuer to be "GOOGLE" or "Google", and the bios-vendor to be coreboot. Historically this was consistently the case, but recent model ChromeOS devices allow the OEM to set the mainboard manufacturer, which is also the default system manufacturer. This breaks many DMI quirks, notably ones used by SOF (sound open firmware) for audio. To fix this, set the system manufactuer for ChromeOS devices to "Google" for devices selecting CONFIG_EC_GOOGLE_CHROMEEC_SKUID, leaving the OEM customization in place for the mainboard manufacturer. Since boards selecting CONFIG_EC_GOOGLE_CHROMEEC_SKUID are the only ones overriding the default mainboard manufacturer, they are the only ones which need this correction. Test: build/boot google/bloog with Linux 5.16, verify SOF drivers correctly detect device as a Chromebook and load the appropriate audio firmware. Change-Id: I9de17fa12689ab4e627b995818aa3d2653102b04 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62796 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs/merlin: Use ECWR functionSean Rhodes
Use ECWR function, instead of writing raw values to emem, to avoid a lack of syncronisation as it uses a mutex. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I90cfd3e1752fe25493bd72ea6bcab1fd9318d2e3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62637 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Write the correct value for KLBE when suspendingSean Rhodes
The current code will write the raw value from the CMOS, which doesn't match the respective setting in EC. Switch argument will write the correct value, and prevent the setting being reset. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I40dc78c743f4201a11ea0c26a8af716cab42b805 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Write the correct value for KLSE when suspendingSean Rhodes
The current code will write the raw value from the CMOS, which doesn't match the respective setting in EC. Switch argument will write the correct value, and prevent the setting being reset. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I93444cdb96eaf729630b48551d0853511b584634 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Write the correct value for TPLE when suspendingSean Rhodes
The current code will write the raw value from the CMOS, which doesn't match the respective setting in EC. Switch argument will write the correct value, and prevent the setting being reset. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Iabeec47bf492b698f95d86aa2d08ba9caedd75f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Store the correct value for KLBE when suspendingSean Rhodes
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ic2a83df9a270de6d7bab295e732a6c13accbe17c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62606 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs: Store the correct value for KLSE when suspendingSean Rhodes
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I62e0fc3b6fcae72f2d8eacf37a390b4e4b1f0783 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62605 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs: Store the correct value for TPLE when suspendingSean Rhodes
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I921be8aea55b95f1ba233d2640d9bae80f8c3703 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62604 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs/merlin: Change RPTS method to SerializedSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id64d321846dc042d4092d39ce9598d028ab15ed0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-03-09ec/starlabs: Correct Keyboard Backlight offsets for GLKSean Rhodes
Correct the offsets used for the keyboard backlight control: ECRAM_KBL_STATE 0x19 ECRAM_KBL_BRIGHTNESS 0x18 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I23bac43301635e6b18f1cbd28311e7210b049c70 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-08ec/starlabs: Guard Max Charge in KconfigSean Rhodes
Guard Max Charge EC write in Kconfig so it's only used on platforms that support it. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I7be39cd9543c8253d53070950edc6908a21e864a Reviewed-on: https://review.coreboot.org/c/coreboot/+/62123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-08ec/starlabs/merlin: Disable ACPI support last when suspendingSean Rhodes
When entering suspend, ACPI support is disabled by setting OSFG to 0x00. This has been moved to be the final action, so it is after saving the current EC settings. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I5705efab42d2fe0fd5abc6c17eeea46ead27db17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62335 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-08ec/starlabs/merlin: Use ECRD functionSean Rhodes
Use ECRD function, instead of getting raw values from emem, to avoid a lack of syncronisation as it uses a mutex. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I31113ef9af3a1e171e3e1f226e7adcfa0fbce61b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-03ec/starlabs/merlin: Don't report a battery capacity higher than design capacitySean Rhodes
If B1FC (Battery Full Capacity) is higher than B1DC (Battery Design Capacity), only report the design capacity. This handles cases where the battery calibration is incorrect, and the battery runs out before the OS thinks it's empty. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ib3e4769c809b69e0a237b5f043e6c41c12d53752 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-01ec/starlabs/merlin: Remove unused keyboard.aslSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ife0f5b8b6102b543a7ace6739fa44d32ca80dcde Reviewed-on: https://review.coreboot.org/c/coreboot/+/62333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-03-01ec/starlabs/merlin: Add spaces to adhere to coding styleSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I0e965513d5888398834cab8c8445e97372f2b115 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-02-21ec/google/chromeec/ec_acpi.c: Cast compatible enum typesArthur Heymans
Clang complains about this. Change-Id: If7af9d5a81c1c381490c9634e3da68ff7f5edda8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-02-18arch/x86/acpi: Add code for KEY_MENUBoris Mittelberg
Support of MENU key (aka hamburger) for Chromebooks with Vivaldi keyboard BUG=b:215038215 TEST=manually tested on Anahera device: pressing T13 key opens menu Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I07873dd9385c743a6512408688ec44a5e97219f9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61835 Reviewed-by: Rajat Jain <rajatja@google.com> Reviewed-by: Lance Zhao Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-18ec/google/chromeec: Update ec_commands.hBoris Mittelberg
This change copies ec_commands.h directly from the Chromium OS EC repo, with the exception of changing the copyright header to SPDX format. Update to commit hash af9a119 Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I1f2a140257d6127fb19bb514bc345466247b7499 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-02-16Use the fallthrough statement in switch loopsArthur Heymans
Clang does not seem to work with 'fall through' in comments. Change-Id: Idcbe373be33ef7247548f856bfaba7ceb7f749b5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-02-15ec/starlabs/merlin: Adjust Keyboard Backlight configurationSean Rhodes
* Change TGL Q Event for Keyboard Backlight to Q4A * Change enabled value to 0xdd Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ibae95e458f14b9d03ff50cb6222b336fd015d0e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-02-15ec/starlabs/merlin: Apply EC settings when suspendingSean Rhodes
Currently, the settings from CMOS were written to the EC, which was pointless. Now, when suspending, the EC values are stored in CMOS when suspending and subsequently restored when waking. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I998d5509cd5e95736468f88663a1423217cf6ddf Reviewed-on: https://review.coreboot.org/c/coreboot/+/60165 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-02-07treewide: Remove "ERROR: "/"WARN: " prefixes from log messagesJulius Werner
Now that the console system itself will clearly differentiate loglevels, it is no longer necessary to explicitly add "ERROR: " in front of every BIOS_ERR message to help it stand out more (and allow automated tooling to grep for it). Removing all these extra .rodata characters should save us a nice little amount of binary size. This patch was created by running find src/ -type f -exec perl -0777 -pi -e 's/printk\(\s*BIOS_ERR,\s*"ERROR: /printk\(BIOS_ERR, "/gi' '{}' ';' and doing some cursory review/cleanup on the result. Then doing the same thing for BIOS_WARN with 's/printk\(\s*BIOS_WARNING,\s*"WARN(ING)?: /printk\(BIOS_WARNING, "/gi' Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I3d0573acb23d2df53db6813cb1a5fc31b5357db8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Lance Zhao Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>