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path: root/src/ec/starlabs/merlin/acpi
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2024-06-07ec/starlabs/merlin/battery: Calculate unknown valuesSean Rhodes
If the EC doesn't know a value, it will report it as 0xffff. In these cases, calculate a value to used based on others. For example, if the EC doesn't know the last full charge capacity, report the design capacity to the OS. Change-Id: I310555ff913c2e492bbaec4d77281ac32c0de7a3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81408 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-06-07ec/starlabs/merlin/battery: Check values are valid before using themSean Rhodes
Change-Id: I559aca98044b7f0e6b08c475b5383c014bb4cd3f Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81407 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-06-07ec/starlabs/merlin: Report the battery cycle count to ACPISean Rhodes
Change-Id: Iccb60d3530227fb71a3ce5a3ab1421627cc86611 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81405 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-06-07ec/starlabs/merlin/battery: Add extended battery informationSean Rhodes
Add BIX Method to report extended battery information. Change-Id: Ie5baecb20c7d4600e0cf1d19ff5f67ce2003fa1d Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81402 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2024-02-15ec/starlabs/merlin: Remove ubtc.aslSean Rhodes
Remove the ubtc.asl as it's no longer needed. Change-Id: I8564bb7d9bd94c8303c543c078bc76192539c5f2 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80484 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-02-15ec/starlabs/merlin: Remove the CMOS Bank 1 entriesSean Rhodes
These entries no longer exist as they are stored in CFR. Change-Id: Ia85855fddc36db76a65490a1d685e1943db28b74 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80483 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-08-10ec/starlabs/merlin: Remove the UCSI ACPISean Rhodes
The UCSI mailbox isn't used, so remove it. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I03587a2322b1f34fa26a5c2ba7906a4e1ae82ae0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-04-28ec/starlabs/merlin/acpi: Don't attempt to change EC valuesSean Rhodes
The EC will constantly update the battery variables approximately every 60 seconds; they should be used unmodified, rather than trying to change them. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3cff0ac6a322018cbca33b5f90dd62b3475da25c Reviewed-on: https://review.coreboot.org/c/coreboot/+/74186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2022-12-27{superio,ec}/acpi: Replace constant "One" with actual numberFelix Singer
Change-Id: I5c77b6d1e1dc1134f62dcb3e93df01dc9c2f386c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71520 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-21ec/starlabs/merlin: Always store EC valuesSean Rhodes
The EC values will be changed when entering S3, S4 or S5, so move the function that stores the current settings outside of logic that restricts it to S4 or S5. This means the state isn't lost when entering S3. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-03-10ec/starlabs/merlin: Use ECWR functionSean Rhodes
Use ECWR function, instead of writing raw values to emem, to avoid a lack of syncronisation as it uses a mutex. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I90cfd3e1752fe25493bd72ea6bcab1fd9318d2e3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62637 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Write the correct value for KLBE when suspendingSean Rhodes
The current code will write the raw value from the CMOS, which doesn't match the respective setting in EC. Switch argument will write the correct value, and prevent the setting being reset. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I40dc78c743f4201a11ea0c26a8af716cab42b805 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62609 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Write the correct value for KLSE when suspendingSean Rhodes
The current code will write the raw value from the CMOS, which doesn't match the respective setting in EC. Switch argument will write the correct value, and prevent the setting being reset. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I93444cdb96eaf729630b48551d0853511b584634 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Write the correct value for TPLE when suspendingSean Rhodes
The current code will write the raw value from the CMOS, which doesn't match the respective setting in EC. Switch argument will write the correct value, and prevent the setting being reset. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Iabeec47bf492b698f95d86aa2d08ba9caedd75f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-10ec/starlabs: Store the correct value for KLBE when suspendingSean Rhodes
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ic2a83df9a270de6d7bab295e732a6c13accbe17c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62606 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs: Store the correct value for KLSE when suspendingSean Rhodes
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I62e0fc3b6fcae72f2d8eacf37a390b4e4b1f0783 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62605 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs: Store the correct value for TPLE when suspendingSean Rhodes
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I921be8aea55b95f1ba233d2640d9bae80f8c3703 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62604 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10ec/starlabs/merlin: Change RPTS method to SerializedSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id64d321846dc042d4092d39ce9598d028ab15ed0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62417 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-03-08ec/starlabs/merlin: Disable ACPI support last when suspendingSean Rhodes
When entering suspend, ACPI support is disabled by setting OSFG to 0x00. This has been moved to be the final action, so it is after saving the current EC settings. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I5705efab42d2fe0fd5abc6c17eeea46ead27db17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62335 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-08ec/starlabs/merlin: Use ECRD functionSean Rhodes
Use ECRD function, instead of getting raw values from emem, to avoid a lack of syncronisation as it uses a mutex. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I31113ef9af3a1e171e3e1f226e7adcfa0fbce61b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-03ec/starlabs/merlin: Don't report a battery capacity higher than design capacitySean Rhodes
If B1FC (Battery Full Capacity) is higher than B1DC (Battery Design Capacity), only report the design capacity. This handles cases where the battery calibration is incorrect, and the battery runs out before the OS thinks it's empty. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ib3e4769c809b69e0a237b5f043e6c41c12d53752 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-01ec/starlabs/merlin: Remove unused keyboard.aslSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ife0f5b8b6102b543a7ace6739fa44d32ca80dcde Reviewed-on: https://review.coreboot.org/c/coreboot/+/62333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-03-01ec/starlabs/merlin: Add spaces to adhere to coding styleSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I0e965513d5888398834cab8c8445e97372f2b115 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-02-15ec/starlabs/merlin: Apply EC settings when suspendingSean Rhodes
Currently, the settings from CMOS were written to the EC, which was pointless. Now, when suspending, the EC values are stored in CMOS when suspending and subsequently restored when waking. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I998d5509cd5e95736468f88663a1423217cf6ddf Reviewed-on: https://review.coreboot.org/c/coreboot/+/60165 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-01-07ec/starlabs/merlin: Unify EC and CMOS namesSean Rhodes
End all CMOS variable with a C and EC variables with an E. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie0fab6b9dcd805f7b8c9bf8f14b0a799d8f396c8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2022-01-04starlabs: Convert EC_GPE_SCI to KconfigSean Rhodes
Convert EC_GPI_SCI to Kconfig option with default value of 0x50 that is used by most boards. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8d47ebe76394fe1bcb217e0c6211db1566f82189 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60229 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-01-01ec/starlabs/merlin/acpi: Replace Index() with ASL 2.0 syntaxFelix Singer
Replace `Index (FOO, 0)` with `FOO[0]`. Change-Id: I88cb974ed808b602a9398c9c3e363cb145420528 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60561 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-31ec/starlabs/merlin/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: I4f8b71c90f0c56fdb29c4d2e9a2a737f704f3265 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60493 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2021-12-29ec/starlabs/merlin: Use Printf() for debug printsFelix Singer
Built with BUILD_TIMELESS=1 and coreboot.rom remains identical. Change-Id: Ib59cba7bf553e8323c20fd9aa3474f3ecccf465a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-11-22ec/starlabs: Add standardised ITE EC supportSean Rhodes
Add EC support that supports different Q Events and EC memory. Created from the ITE IT5570E and IT8987E datasheets, all using data port 0x4e. Tested with Ubuntu 20.04.3 and Windows 10 on: * StarBook Mk V (TGL + IT5570E): * ITE Firmware 1.00 * Merlin Firmware 1.00 * LabTop Mk IV (CML + IT8987E): * ITE Firmware 1.04 * LabTop Mk III (KBL + IT8987E): * ITE Firmware 3.12 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58343 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 15:22:11 +0000