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2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I89b10076e0f4a4b3acd59160fb7abe349b228321 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39611 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-15ec/google/wilco: Store LID status into LIDS and change device nameEric Lai
Store LID status into LIDS and change device name to LID0. Then Intel driver can reference it. BUG=b:151134069 TEST=check LID status by evtest Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ifdac938730eac034b626aa8ad9d52462f65137ba Reviewed-on: https://review.coreboot.org/c/coreboot/+/39497 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2018-10-31ec/google/wilco: Add ACPI EC infrastructureDuncan Laurie
Add the base ACPI support for the Wilco embedded controller, using ASL 2.0 syntax throughout. This includes the EC device and its resources, as well as the layout for the EC RAM and the functions needed to read and write to the EC RAM. The EC RAM address space is typically read/write, and so the ACPI EC device expects that a defined Field can be read and/or written. With this EC the read and write address spaces are different. For example, a read from address zero will return data that is unrelated to what a write to address zero expects. This makes using a typical OperationRegion to describe the EC RAM address space somewhat impracticle, since field definitions would overlap. Instead, methods are provided for reading and writing to an EC RAM offset, and the EC RAM layout is defined as a Package that describes offset+mask for read or write fields within the EC RAM. Change-Id: If8cfdf2633db1ccad4306fe877180ba197ee7414 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/29122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>