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Stefan thinks they don't add value.
Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)
The exceptions are for:
- crossgcc (patch file)
- gcov (imported from gcc)
- elf.h (imported from GNU's libc)
- nvramtool (more complicated header)
The removed lines are:
- fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-# This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */
Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Done with sed and God Lines. Only done for C-like code for now.
Change-Id: I422d072a9ab3350e364004ba34911cd183fc6612
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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They're listed in AUTHORS and often incorrect anyway, for example:
- What's a "Copyright $year-present"?
- Which incarnation of Google (Inc, LLC, ...) is the current
copyright holder?
- People sometimes have their editor auto-add themselves to files even
though they only deleted stuff
- Or they let the editor automatically update the copyright year,
because why not?
- Who is the copyright holder "The coreboot project Authors"?
- Or "Generated Code"?
Sidestep all these issues by simply not putting these notices in
individual files, let's list all copyright holders in AUTHORS instead
and use the git history to deal with the rest.
Change-Id: I89b10076e0f4a4b3acd59160fb7abe349b228321
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39611
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Move the ECPD (GOOG0003) device under CREC (GOOG0004) so that the ECPD AP
device drivers can access the parent EC device to communicate with the
EC. Also, update the Notify() call to reflect the new location of the
ECPD device.
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Change-Id: I830b030c7a063506f50f9cd51df3a5018e248fc2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Use AGPIO 10 as the EC sync interrupt for MKBP events for sensor data.
On this platform, interrupts are routed via the GPIO controller so need to be
registered using GpioInt instead of Interrupt.
BUG=b:123750725
BRANCH=grunt
TEST=MKBP events still received (with matching EC and kernel changes)
Change-Id: If499d24511bbaa7054207b7e0b98445723332c4f
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/31278
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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EC_SYNC_IRQ from EC to host is level-triggered in practice and
configuring it as edge-triggered on the host results in host missing
events if there are multiple events queued on the EC side. This is
because Linux kernel driver reads one event per irq and the EC does
not de-assert the interrupt line until all events are drained
out. This results in event queue being filled up completely on the EC
and the host failing to see any of those events.
This change configures EC_SYNC_IRQ as level triggered to allow the
host to read events from the the EC as long as the line is asserted.
BUG=b:118949877
Change-Id: Id3fcfa0445f83865d57975a7bbc179dca047ba4c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/29575
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@google.com>
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Some boards are adding a second pin used for synchronization between
the EC and AP. This is a direct connection between the EC and the SOC
that is intended to provide a lower latency interrupt signal for
sensors on the EC.
Currently the runtime EC interrupts assert an SCI before eventually
resulting in a Notify() on the MKBP device that the sensor driver users.
These extra layers add processing time and require additional EC
communication to determine the event source.
This interface was tested on a reworked Nocturne board with modified
EC and a modified kernel driver to ensure that the interrupt asserts
as expected and can be used by the kernel driver.
Change-Id: I49a11363ce82882e572bcb8923fd114ab6593fea
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/28758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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Some ACPI interfaces introduced by Chrome or coreboot do not
need drivers outside ChromeOS, for example Chrome EC or
coreboot table; or will be probed by direct ACPI calls (instead
of trying to find drivers by device IDs).
These interfaces should be set to hidden so non-ChromeOS systems,
for example Windows, won't have problem finding driver.
Interfaces changed:
- coreboot (BOOT0000), only used by Chrome OS / Linux kernel.
- Chrome OS EC
- Chrome OS EC PD
- Chrome OS TBMC
- Chrome OS RAMoops
BUG=b:72200466
BRANCH=eve
TEST=Boot into non-ChromeOS systems (for example Windows)
and checked ACPI devices on UI.
Change-Id: I9786cf9ee07b2c3f11509850604f2bfb3f3e710a
Signed-off-by: David Wu <David_Wu@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1078211
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Trybot-Ready: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/28333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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On some detachables, the mere presence of attached base is not enough to
determine whether the device is in tablet mode or not, so we introducing
a new "switch" in EC, separate from "Tablet Mode" switch, to signal
whether the base is attached or not.
We also want the driver to be separate from cros_ec_keyb, so we create
a new ACPI device, C(hrome)B(ase)A(ttached)S(witch), with HID GOOG000B,
and guard it with EC_ENABLE_CBAS_DEVICE.
Change-Id: Id73a12f04a1a48f7fbd9365c2a501afadf3878fa
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-on: https://review.coreboot.org/28260
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This change adds _PRW property to CREC device that allows Linux kernel
to identify CREC as a wakeup source.
BUG=b:69118395
TEST=Verified following steps:
1. Under sys devices for CREC: "echo enabled > wakeup"
2. Lid close/Lid open -- Verified that wakeup_count increases
3. Mode change -- Verified that wakeup_count increases
Change-Id: Ib0a687e171c7e5c81325b39f47c9a2462553fe3e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/23399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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This is required to pass button information from EC to kernel without
using 8042 keyboard driver.
1. Define EC buttons device using GOOG0007 ACPI ID.
2. Guard enabling of this device using EC_ENABLE_MKBP_DEVICE.
BUG=b:35774934
BRANCH=None
TEST=Verified using evtest that kernel is able to get button
press/release information from EC.
Change-Id: I4578f16648305350d36fb50f2a5d2285514daed4
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18641
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
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Add a GOOG0004 object that will be used to load cros_ec_lpc.
BUG=chromium:516122
BRANCH=none
TEST=Compile. Work in cyan branch.
Change-Id: Id8d9487ea6f376728eaa57728baceda7e5f6b2b9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6380104986d2740a14fc74161fec9f2994d2affc
Original-Change-Id: I682d68e0858327ec7c0fbd0924dd9f99527d4df0
Original-Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/342363
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14686
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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