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path: root/src/drivers/tpm/cr50.c
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2022-05-16drivers/i2c/tpm: Work around missing firmware_version in Ti50 < 0.0.15Reka Norman
Ti50 firmware versions below 0.0.15 don't support the firmware_version register and trying to access it causes I2C errors. Some nissa boards are still using Ti50 0.0.12, so add a workaround Kconfig to skip reading the firmware version and select it for nissa. The firmware version is only read to print it to the console, so it's fine to skip this. This workaround will be removed once all ODM stocks are updated to 0.0.15 or higher. A similar workaround Kconfig was added in CB:63011 then removed in CB:63158 which added support for separate handling of Cr50 and Ti50. But we actually still need this workaround until all Ti50 stocks are upgraded to 0.0.15 or higher. BUG=b:224650720 TEST=Boot to OS on nereid with Ti50 0.0.14 Change-Id: Ia30d44ac231c42eba3ffb1cb1e6d83bb6593f926 Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64202 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-24tpm: Allow separate handling of Google Ti50 TPMJes Klinke
A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. This change makes use of Kconfigs TPM_GOOGLE_CR50 and TPM_GOOGLE_TI50 to be able to take slightly different code paths, when e.g. evaluating whether TPM firmware is new enough to support certain features. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63158 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-30drivers/tpm: Force enable long IRQ pulses for Ti50 versions under 0.15.Reka Norman
Only Cr50 versions starting at 0.5.5 support long IRQ pulses, so this feature is enabled based on the value of the board_cfg register (see CB:61722). However, Ti50 versions below 0.0.15 don't support the board_cfg register, and trying to access it will cause I2C errors (see CB:63011). Also, all Ti50 versions only support long IRQ pulses. Therefore, add a workaround to force enable long IRQ pulses for boards using Ti50 versions under 0.0.15, instead of enabling it based on board_cfg. This workaround will be removed once all Ti50 stocks are updated to 0.0.15 or higher. BUG=b:225941781 TEST=Boot nivviks and nereid to OS with Ti50 0.0.14 and check there are none of these I2C errors: [ERROR] I2C stop bit not received [ERROR] cr50_i2c_read: Address write failed [ERROR] cr50_i2c_tis_status: Failed to read status Change-Id: Iaba71461d8ec79e8d6efddbd505339cdf1176485 Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63160 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kangheui Won <khwon@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-22drivers/tpm/cr50: Use cr50_get_firmware_version in get_board_cfgTim Wawrzynczak
cr50_get_board_cfg() may be called in ramstage for some mainboards in order to determine the BOARD_CFG register's value. The code was written assuming that the firmware version was already retrieved, but for boards calling this in ramstage, this is not the case. Therefore, instead of using the cached cr50_firmware_version (which is all 0s in ramstage at that time), use the cr50_get_firmware_version function instead. BUG=b:225206079, b:220685274 BRANCH=firmware-brya-14505.B TEST=boot on brya0 and see: [INFO ] Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.93/cr50_v3.94 [INFO ] Enabling GPIO PM b/c CR50 has long IRQ pulse support in the logs. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ia6e5f4965a8852793d2f95e6eb21ea87860335a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62964 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-03-09{drivers/security}: Replace `cb_err_t` with `enum cb_err`Subrata Banik
This patch replaces remaining `cb_err_t` with `enum cb_err` after commit hash 69cc557c (commonlib/bsd: Remove cb_err_t) removes majority of `cb_err_t` instances. TEST=Able to build the brya. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3392f9c2cfb4a889a999c8ea25066c89979f0900 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62676 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-03-07drivers/tpm/cr50: Add I2C bus support to cr50 driverTim Wawrzynczak
This allows mainboards using an I2C bus to communicate with the cr50 to reuse the functionality related to firmware version and BOARD_CFG. BUG=b:202246591 TEST=boot on brya0, see cr50 FW version in logs Change-Id: Ide1a7299936193da3cd3d15fdfd1a80994d70da0 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-07drivers/tpm/spi: Refactor out some cr50-specific logicTim Wawrzynczak
Mainboards accessing the cr50 over an I2C bus may want to reuse some of the same firmware version and BOARD_CFG logic, therefore refactor this logic out into a bus-agnostic file, drivers/tpm/cr50.c. This file uses the new tis_vendor_read/write() functions in order to access the cr50 regardless of the bus which is physically used. In order to leave SPI devices intact, the tis_vendor_* functions are added to the SPI driver. BUG=b:202246591 TEST=boot to OS on google/dratini, see the same FW version and board_cfg console prints as before the change. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ie68618cbe026a2b9221f93d0fe41d0b2054e8091 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61977 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>