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path: root/src/drivers/spi/tpm/tpm.c
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2017-11-16drivers/spi/tpm: Poll TPM_VALID bit until validShelley Chen
In case the TPM is doing a long crypto operation the initial probe could be very delayed. Rather than end up in recovery make the delay long enough to accommodate the (current) long crypto times. This would add a maximum of 30 seconds to boot time. Mirroring changes done on i2c side in CL:756918 BUG=b:65867313, b:68729265 BRANCH=None TEST=Make sure fizz boots up Change-Id: Ie944bfb6fe33d6e9ee794439165716ab624be491 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/22370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-01spi/tpm: Make sure AP properly syncs up with Cr50Vadim Bendebury
When Cr50 TPM is being reset, it continues replying to the SPI bus requests, sends wrong register values in response to read requests. This patch makes sure that the TPM driver does not proceed unless proper value is read from the TPM device identification register. If the read value is still wrong after 10 retries taken with 10 ms intervals, the driver gives up and declares TPM broken/unavailable. BRANCH=cr50 BUG=b:68012381 TEST=ran a script resetting the Fizz device as soon as the "index 0x1007 return code 0" string shows up in the AP console output. The script keeps rebooting the Fizz indefinitely, before this script Fizz would fail to read TPM properly and fall into recovery after no more than four reboots. Change-Id: I7e67ec62c2bf31077b9ae558e09214d07eccf96b Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/22231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-13drivers/spi/tpm: Clean up SPI TPM driverFurquan Shaikh
1. Move common TIS macros to include/tpm.h. 2. Use common TIS macros while referring to status and access registers. 3. Add a new function claim_locality to properly check for required access bits and claim locality 0. BUG=b:36873582 Change-Id: I11bf3e8b6e1f50b7868c9fe4394a858488367287 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19213 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2017-04-05drivers/spi/tpm: Make SPI TPM driver CAR-safeFurquan Shaikh
1. Use proper CAR semantics for global/static variables. 2. Use spi_* functions directly instead of using a global structure to store pointers to those functions. BUG=b:36873582 Change-Id: I1fc52ab797ef0cbd3793a387d68198efc5dde58c Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19114 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-05drivers/spi/tpm: using tpm irq to sync tpm transactionJeffy Chen
BUG=b:35647967 TEST=boot from bob Change-Id: Ib64107b17fb6e93dbe626ce92f3bc9da8b84784e Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/452284 Commit-Ready: Caesar Wang <wxt@rock-chips.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19113 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-05drivers/spi/tpm: try to wake cr50 if it is asleepJeffy Chen
BUG=b:35775002 TEST=boot from bob Change-Id: I6324f3c02da55a8527f085ba463cbb1f4fb5dc2e Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/452283 Commit-Ready: Caesar Wang <wxt@rock-chips.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19112 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-04-03drivers/spi/tpm: make tpm_info object local to compilation unitAaron Durbin
The tpm_info object is a global, but its symbol does not need to be exposed to the world as its only used within tpm.c. BUG=b:36598499 Change-Id: Idded3dad8d0d1c3535bddfb359009210d3439703 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19057 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2017-04-03drivers/spi/tpm: de-assert chip select on transaction errorAaron Durbin
In the case of start_transaction() failing the chip select is never deasserted. Correct that by deasserting the chip select when start_transaction() fails. BUG=b:36598499 Change-Id: I2c5200085eb357259edab39c1a0fa7b1d81ba7b2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19056 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-12-16tpm2: handle failures more gracefullyVadim Bendebury
When trying to bring up a device with a malfunctioning TPM2 chip, the driver currently gets stuck waiting for SPI flow control, causing bricked devices. This patch puts a 100 ms cap on the waiting time - this should be enough even for a longest NVRAM save operation which could be under way on the TPM device. BRANCH=gru BUG=chrome-os-partner:59807 TEST=with a matching change in depthcharge, now a gru with corrupted SPI TPM comes up to the recovery screen (it was not showing signs of life before this change). Change-Id: I63ef5dde8dddd9afeae91e396c157a1a37d47c80 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/17898 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-12-05spi: Pass pointer to spi_slave structure in spi_setup_slaveFurquan Shaikh
For spi_setup_slave, instead of making the platform driver return a pointer to spi_slave structure, pass in a structure pointer that can be filled in by the driver as required. This removes the need for platform drivers to maintain a slave structure in data/CAR section. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: Ia15a4f88ef4dcfdf616bb1c22261e7cb642a7573 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17683 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-05spi: Fix parameter types for spi functionsFurquan Shaikh
1. Use size_t instead of unsigned int for bytes_out and bytes_in. 2. Use const attribute for spi_slave structure passed into xfer, claim bus and release bus functions. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: Ie70b3520b51c42d750f907892545510c6058f85a Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17682 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-03spi/tpm: read TPM version in larger chunksVadim Bendebury
The TPM version string has become much longer recently, and the TPM_FW_VER register available on VID 1ae0 devices supports reading in arbitrary size quantities. Let's read 50 bytes at a time to reduce the SPI register read wrapper overhead, and increase the length limit to 300 bytes to accommodate longer version strings. TEST=verified on the Kevin device: localhost ~ # grep cr50 /sys/firmware/log Firmware version: RO_A: 0.0.1/84e2dde7 RO_B:* 0.0.2/13eda43f RW_A:* cr50_v1.1.5005-444ddb7 RW_B: cr50_v1.1.5005-5aac83c cr50_v1.1.5005-444ddb7 private-cr51:v0.0.66-bd9a0fe tpm2:v0.0.259-8f3d735 cryptoc:v0.0.4-5319e83 2016-07-31 10:58:05 vbendeb@kvasha Change-Id: Ifaf28c1a9a3990372a9cec108c098edbe50d3243 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/16000 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-12tpm: report firmware versionVadim Bendebury
Some devices allow to retrieve firmware version by reading the same 4 byte register repeatedly until the entire version string is read. Let's print out TPM firmware version when available. Just in case something goes wrong limit the version string length to 200 bytes. CQ-DEPEND=CL:355701 BRANCH=none BUG=chrome-os-partner:54723 TEST=built the new firmware and ran it on Gru, observed the following in the coreboot console log: Connected to device vid:did:rid of 1ae0:0028:00 Firmware version: cr50_v1.1.4792-7a44484 Original-Commit-Id: 1f54a30cebe808abf1b09478b47924bb722a0ca6 Original-Change-Id: Idb069dabb80d34a0efdf04c3c40a42ab0c8a3f94 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/355704 Original-Reviewed-by: Scott Collyer <scollyer@chromium.org> Squashed with: tpm: use 4 byte quantities when retrieving firmware version The CR50 device is capable of reporting its firmware version in 4 byte quantities, but the recently introduced code retrieves the version one byte at a time. With this fix the version is retrieved in 4 byte chunks. BRANCH=none BUG=none TEST=the version is still reported properly, as reported by the AP firmware console log: localhost ~ # grep cr50 /sys/firmware/log Firmware version: cr50_v1.1.4804-c64cf24 localhost ~ # Original-Commit-Id: 3111537e7b66d8507b6608ef665e4cde76403818 Original-Change-Id: I04116881a30001e35e989e51ec1567263f9149a6 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/356542 Original-Reviewed-by: Andrey Pronin <apronin@chromium.org> Change-Id: Ia9f13a5bf1c34292b866f57c0d14470fe6ca9853 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/15573 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-11tpm: use proper locality zero SPI bus addressesVadim Bendebury
The "PC Client Protection Profile for TPM 2.0" document defines SPI bus addresses for different localities. That definition is not honored in the cr50 implementation, this patch fixes it: locality zero register file is based off 0xd40000. BRANCH=none BUG=chrome-os-partner:54720 TEST=with the fixed cr50 image and the rest of TPM2 initialization patches applied factory initialization sequence on Gru succeeds. Change-Id: I49b7ed55f0360448b9a6602ebd31a3a531608da3 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 43344fff5d58ec235e50030413fc38c98dd0a9a1 Original-Change-Id: I2de6fa6c05d3eca989d6785228d5adde1f2a7ab7 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/355620 Original-Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://review.coreboot.org/15568 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-06-23tpm2: add SPI TPM driverVadim Bendebury
This introduces a SPI TPM driver compliant with the TCG issued "TPM Profile (PTP) Specification Revision 00.43" which can be found by googling its title. The driver implements both the hardware flow control protocol and the TPM state machine. The hardware flow control allows to map SPI based TPM devices to the LPC address space on x86 platforms, on all other platforms it needs to be implemented in the driver software. The tis layer is somewhat superficial, it might have to be expanded later. A lot more implementation details can be found in the code comments. Also, it is worth mentioning that this is not a complete version of the driver: its robustness needs to be improved, delay loops need to be bound, error conditions need to propagate up the call stack. BRANCH=none BUG=chrome-os-partner:52132, chrome-os-partner:50645, chrome-os-partner:54141 TEST=with the rest of the patches applied coreboot is able complete Chrome OS factory initialization of the TPM2 device. Change-Id: I967bc5c689f6e6f345755f08cb088ad37abd5d1c Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 5611c6f7d7fe6d37da668f337f0e70263913d63e Original-Change-Id: I17d732e66bd231c2289ec289994dd819c6276855 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/350124 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15298 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com> Tested-by: build bot (Jenkins)
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