coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-11-09	acpi: Call acpi_fill_ssdt() only for enabled devices	Karthikeyan Ramasubramanian
	Individual drivers check whether the concerned device is enabled before filling in the SSDT. Move the check before calling acpi_fill_ssdt() and remove the check in the individual drivers. BUG=None TEST=util/abuild/abuild Change-Id: Ib042bec7e8c68b38fafa60a8e965d781bddcd1f0 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47148 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com>
2020-07-14	src: Remove unused 'include <stdint.h>	Elyes HAOUAS
	Found using: diff <(git grep -l '#include <stdint.h>' -- src/) <(git grep -l 'int8_t\\|int16_t\\|int32_t\\|int64_t\\|intptr_t\\|intmax_t\\|s8\\|u8\\|s16\\|u16\\|s32\\|u32\\|s64\\|u64\\|INT8_MIN\\|INT8_MAX\\|INT16_MIN\\|INT16_MAX\\|INT32_MIN\\|INT32_MAX\\|INT64_MIN\\|INT64_MAX\\|INTMAX_MIN\\|INTMAX_MAX' -- src/) \|grep -v vendorcode \|grep '<' Change-Id: I5e14bf4887c7d2644a64f4d58c6d8763eb74d2ed Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41827 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-22	drivers/intel/soundwire: Add Intel SoundWire controller driver	Duncan Laurie
	This driver provides support for Intel SoundWire controllers. It is intended to be used by multiple Intel SoCs and relies on retrieving controller/master information from the SoC itself. As such it provides a function that must be implemented by the SoC to fill out this structure. The Intel SoundWire driver in the Linux kernel expects firmware to inform it which master links are unused by adding a custom property to the link descriptor. This is done by looking for any children attached to the device that use each link and disabling the ones that are unused. Mainboards will enable this driver and define the controller in devicetree.cb in order provide the required ACPI tables, but the mainboard should not need to provide any configuration itself as that should all come from the SoC directly. This was tested with the volteer board by adding this controller and a codec to devicetree.cb and ensuring that the properties are all present, including the custom properties for the device clock and quirk mask for disabled links. Device (SNDW) { Name (_ADR, 0x40000003) Name (_CID, Package () { "PRP0001", "PNP0A05" }) Name (_DDN, "Intel SoundWire Controller") Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-sw-interface-revision", 0x00010000 }, Package () { "mipi-sdw-master-count", 0x04 } }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), Package () { Package () { "mipi-sdw-link-0-subproperties", "LNK0" }, Package () { "mipi-sdw-link-1-subproperties", "LNK1" }, Package () { "mipi-sdw-link-2-subproperties", "LNK2" }, Package () { "mipi-sdw-link-3-subproperties", "LNK3" }, } } Name (LNK0, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () { "mipi-sdw-clock-stop-mode0-supported", One }, [...] Package () { "intel-sdw-ip-clock", 0x0249F000 }, Package () { "intel-quirk-mask", Zero }, } } [...] } BUG=b:146482091 Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: I4b4f843a7e5ea170b070a1697c8eedc7c103e127 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40888 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>