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2016-08-01Add newlines at the end of all coreboot filesMartin Roth
Change-Id: I7930d5cded290f2605d0c92a9c465a3f0c1291a2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15974 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-04-01intel/gma: Fix VBT generationPatrick Rudolph
The log shows the following error on systems that use the native gfx init. The error isn't shown using the VBIOS blob: GET_VBIOS: aa55 8086 0 3 0 VBIOS not found. Don't shift the class-code, as it's already shifted by the PCI layer. Tested-on: x220 Tested-by: Alexander Couzens <lynxis@fe80.eu> Change-Id: I69018940dd51966b45774e0576a1380f90716dce Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/14188 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-10-31intel/gma: Return success for Intel int15 VGA set panel type hookKonstantin Aladyshev
One of the interrupts in intel_vga_int15_handler lacks positive return status. Write correct status to avoid error messages in log. TEST=With this change `int15 call returned error` is not shown anymore on a custom board with Intel Atom CPU, i945GME northbridge and i82801gx southbridge. Change-Id: I740b2df9bd6a7d261d89bef74b924edbb64354aa Signed-off-by: Konstantin Aladyshev <aladyshev@nicevt.ru> Reviewed-on: http://review.coreboot.org/12255 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-22gma ACPI: Make brightness levels a per board settingNico Huber
Those are actually board specific. Keep the old value as defaults, though. The defaults are included by all affected boards. Change-Id: Ib865c7b4274f2ea3181a89fc52701b740f9bab7d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11705 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-10-12gma ACPI: Do not overwrite backlight configurationNico Huber
Changes to CR1 and CR2 were effectively overwriting the backlight configuration from the devicetree with static values. Instead read the maximum brightness value from BCLM (backlight modulation frequency) and calculate the target level (Arg0 is the target level as percentage). Turned out that _BQC has to return a value from the list returned by _BCL. So XBQC got a little heavier to search for the correct value. Change-Id: I35419993c8250c95fc69ba4db30db9dba9e6f8ff Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11704 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-10-12gma ACPI: Consolidate non-PCH and PCH brightness levelsNico Huber
The two cases only differ in the register locations. As the values in BRIG were all the same, consolidate them. They also got normalized to percentages as the ACPI spec wants that (0x61 was 100% before). Change-Id: I9216a953bb89458ed102c39194ea370cbf463d5e Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11703 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
Consolidate some common (and mostly broken) code. Will try to fix things in separate commits. Maybe, igd.asl taken from gm45 (the non-PCH case) could also be used for i945 and sch. But this needs further investigation. Change-Id: Id3663bf588458e1e71920b96a3149f96947921e9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11702 Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Tested-by: build bot (Jenkins)
2015-10-11Kill lvds_num_lanesVladimir Serbinenko
Only one value would work with corresponding gma code currently (which one depends on board). Going forward, it's possible to compute which number can be used, so there is no need to keep this info around. Change-Id: Iadc77ef94b02f892860e3ae8d70a0a792758565d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/11862 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-10-11Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko
Based on the info by Felix Held. Change-Id: Iab84dd8a0e3c942da20a6e21db5510e4ad16cadd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/11857 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-08-28edid: Use edid_mode struct to reduce redundancyDavid Hendricks
This replaces various timing mode parameters parameters with an edid_mode struct within the edid struct. BUG=none BRANCH=firmware-veyron TEST=built and booted on Mickey, saw display come up, also compiled for link,falco,peppy,rambi,nyan_big,rush,smaug [pg: extended to also cover peach_pit, daisy and lenovo/t530] Change-Id: Icd0d67bfd3c422be087976261806b9525b2b9c7e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: abcbf25c81b25fadf71cae106e01b3e36391f5e9 Original-Change-Id: I1bfba5b06a708d042286db56b37f67302f61fff6 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/289964 Original-Reviewed-by: Yakir Yang <ykk@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/11388 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-08Remove empty lines at end of fileElyes HAOUAS
Used command line to remove empty lines at end of file: find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \; Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/10446 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-04Remove address from GPLv2 headersPatrick Georgi
Follow up for commit b890a12, some contributions brought back a number of FSF addresses, so get rid of them again. Change-Id: Idcd059f05523916f726b94931c2487ab028b7d72 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10409 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-05-28igd.asl rewriteVladimir Serbinenko
Old igd.asl had inconsistent addresses (between _DOD and actual device) and ghost devices. Any of those is enough to make brightness on windows fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous copying of the same thing 6 times per chipset. Leave only hooking up and chipset-specific part in chipset directory. Move NVS handling and ACPI-spec parts to a common file. Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7472 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-19ivybridge native gfx init: Adjust state to be compatible with OPROM.Vladimir Serbinenko
My main payload is GRUB and I load SeaBIOS as secondary payload when for some reason I want to boot windows. In this scenario SeaBIOS runs VGA oprom (SeaVGABIOS is not good enough with intel gfx). VGA oprom expects either completely uninited gfx or some special state in gmbus and software scratch registers. Provide this state. The only alternative without this patch for such usecase is to use oprom and I'd like to avoid doing so when going my main boot path to GNU/Linux. Change-Id: I38e78fb845e43b81df084cd4d65f4618bfb2506d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10205 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-19gma/edid: Fix gma register access.Vladimir Serbinenko
0x20 was incorrectly represented as 4 * 5 while in fact it's 4 * 8 Change-Id: I6053a3baa6de0da9f1d648009353bc1fe542f81f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10237 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-08northbridge/intel/gm45/gma: Add backlight control register fieldTimothy Pearson
This allows the backlight control register to be set via devicetree.cb Change-Id: I32b42dfc1cc609fb6f8995c6158c85be67633770 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/9330 Tested-by: build bot (Jenkins)
2015-03-31cbfs: remove cbfs_core.h includesAaron Durbin
Some of the files which include cbfs_core.h don't even need the header definition while others just need the cbfs API which can be obtained from cbfs.h. Change-Id: I34f3b7c67f64380dcf957e662ffca2baefc31a90 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9126 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
2015-01-06doxygen fixes: change @var to @param varMartin Roth
These files were trying to document the parameters, but didn't have the syntax quite right. Change the comments from @varname to @param varname as required by doxygen. Change-Id: I63662094d3f1686e3e35b61925b580eb06e72e28 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/8100 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-11-11drivers/intel/gma/intel_dp.c: Fix printf type-specifierEdward O'Callaghan
'%02hx' is unsigned short, where as the argument is typed as uint8_t and so '%02hhx' is actually correct here. Found-by: Clang Change-Id: I40c48dcecf12845f4708e511236184908e90fb56 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7428 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com> Tested-by: build bot (Jenkins)
2014-09-13intel/gma: consolidate vbt codeVladimir Serbinenko
Change-Id: I80b7facfb9cc9f642dd1c766884dc23da1aab2c8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6800 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-09-11Move nehalem/sandy/ivy to per-device acpiVladimir Serbinenko
Change-Id: I3d664ab575bf9c49a7bff9a395fbab96748430d0 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6802 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2014-09-08Haswell/falco/peppy/slippy: continue to clean up FUI.Ronald G. Minnich
As a first step towards removing hardcodes from the FUI support, change the haswell call to i915_lightup to panel_lightup, and pass the intel_dp * as a parameter. Get rid of the scalar arguments and make them part of intel_dp. Get rid of file-scope variables and use the ones in the intel_dp struct. In falco, use functions that peppy uses. Drop slippy support for FUI, it's a dead board; if this is ok I'll remove the files next. And, incidentally, fix the broken RGBX constant and change it to BGRX. Change-Id: I46ef5a9ed8433382d042066ee3542af04cfc319a Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://chromium-review.googlesource.com/174932 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Ronald Minnich <rminnich@chromium.org> Tested-by: Ronald Minnich <rminnich@chromium.org> (cherry picked from commit 1e1ed410b445c8e2b7411e163d9d6f61499dc3f6) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6833 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2014-09-05Consolidate intel vga int15 hooksVladimir Serbinenko
Change-Id: I9366dded98bf15f6da44ce893dd10698ba09fd55 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6820 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-09-04drivers/gma: remove unused codeRonald G. Minnich
We had brought this code in from the kernel but found it best to use mainboard- or chipset specific versions. Firmware should strive to be as non-generic as possible. Change-Id: Ic1ca746cc52c3f9ea4de6895f2b32946229beada Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://chromium-review.googlesource.com/172625 Tested-by: Ronald Minnich <rminnich@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Ronald Minnich <rminnich@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> (cherry picked from commit 7dba0dfd25bf9e367f9e5128b15edb018e958c3a) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6779 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-28Peppy/Haswell: move more support functions from mainboard to the intel i915 ↵Ronald G. Minnich
driver Move (and rename to make it clearer) the function that computes display parameters from the dpcd and edid. Change-Id: Idfbb56fd312b23c742c52abca1a34ae117a8fece Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://chromium-review.googlesource.com/171366 Reviewed-by: Furquan Shaikh <furquan.m.shaikh@gmail.com> Reviewed-by: Ronald Minnich <rminnich@chromium.org> Tested-by: Ronald Minnich <rminnich@chromium.org> Commit-Queue: Ronald Minnich <rminnich@chromium.org> (cherry picked from commit 8f2b3bafee7cb05db8fae1c52fc9e1ee64e5e35d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6768 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-25intel/gma: Clarify code and use dedicated init for Google PeppyRonald G. Minnich
Peppy had some issues with FUI. We decided it was time to create peppy-specific gma.c and i915io.c files. Using yabel and the i915tool, we generated a replay attack, then interpolated against the slippy i915io.c to get something working. Also, in preparation for moving code out of the mainboard gma.c to generic driver code, we got rid of some hardcodes in the mainboard gma.c that have no business being there. The worst were the computation of gmch_[m,n] and it turns out that we had some long-standing bugs related to confusion about 'bpp'. I've killed the word bpp everywhere I could because there are at least 3 things that correspond to bpp. We now have framebuffer, pipe, and panel bpp. The names are long because I want to avoid all the mistakes we've all been making in the last year :-) Sadly, that means a lot of changes not just peppy-related, but they are simple and in a good cause. The test pattern generation is driven by a global variable in mainboard/peppy/gma.c. I've found in the past that it's very useful to have a function like this available, as one can activate it while using a jtag debugger: halt at the right place in ramstage, set the variable to 1, continue. It's not enough code to worry about always including. The last hard-codes for M and N registers are gone, and the function to set from generic intel_dp.c code works. To avoid screen trash on a dev mode boot, which we liked but nobody else did :-), we now take the time to put a pleasing background color that sort of doubles as a power LED. Rough timing is ramstage start is at 2.2, and dev setup is done at 3.3. These new platforms are depressingly slow to boot. Rom init alone is taking 1.9 seconds. 13 years ago it was 3 seconds from power on to bash prompt. These CPUs are at least 10x faster and take much longer to get going. Future work, once we get this through, is to move more functions to the intel driver, and combine the mainboard i915io.c into the mainboard gma.c. That separation only existed because i915io.c was generated by a tool, and it had lots of ugliness. Most ugliness is gone. Old-Change-Id: I6a6295b423a41e263f82cef33eacb92a14163321 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/170013 Reviewed-by: Stefan Reinauer <reinauer@google.com> Commit-Queue: Ronald Minnich <rminnich@chromium.org> Tested-by: Ronald Minnich <rminnich@chromium.org> Reviewed-by: Furquan Shaikh <furquan.m.shaikh@gmail.com> (cherry picked from commit 8cdaf73e3602e15925859866714db4d5ec6c947d) snow: Fix a typo in devicetree.cb that was breaking the snow build. A typo in a recent change broke the snow build. Old-Change-Id: I93074e68eb3d21510d974fd8e9c63b3947285afd Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171014 Reviewed-by: Ronald Minnich <rminnich@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 154876c126a6690930141df178485658533096d2) Squashed a fix into the initial patch and updated nehalem/gma.c to have a non-static gtt_poll. Change-Id: I2f4342c610d87335411da1d6d405171dc80c1f14 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6657 Tested-by: build bot (Jenkins)
2014-08-13Falco/Slippy: Patch to refactor haswell/gma.c and ↵Furquan Shaikh
mainboard/google/slippy/i915io.c A large portion of documented registers have been initialized using macros. Only a few undocumented registers are left out. i915io.c looks lot more cleaner by removing redundant calls. However, some more work is required to correctly identify which calls are not required. All the io_writes are replaced by gtt_writes. Change-Id: I077a235652c7d5eb90346cd6e15cc48b5161e969 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/66204 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 39f3289f68b527575b0a120960ff67f78415815e) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6600 Tested-by: build bot (Jenkins)
2014-07-29x230: Deploy VBTVladimir Serbinenko
Change-Id: Ide31a56bfdbc31cd3b87993dfb4ed8ef0107cdba Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5396 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-07-21src/drivers: Remove a trailing whitespaceElyes HAOUAS
Change-Id: If357da5d84a255e0bdf8784d559ee0941045bbd6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6309 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-08drivers: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Ie80c87c614a536cc6b0bdbf196c280b64547d3b7 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6203 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-06-25drivers/intel/gma: Uninitialized var before if conditionEdward O'Callaghan
The variable 'wait' is used uninitialized whenever 'if' condition is false if (val & DDI_BUF_CTL_ENABLE) { ^~~~~~~~~~~~~~~~~~~~~~~~ Leading to an uninitialized use occurs here: if (wait) ^~~~ Change-Id: I7d96bf1e33b9c4312d4a0ba8276e83d17d6cd070 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6052 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-06-20drivers/intel/gma: Equality comparison with extraneous parenthesesEdward O'Callaghan
Spotted by Clang. Change-Id: I3e612c0fa050a09fa7e5b1cb643935b84eb2b957 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6053 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-06-01i915_reg: Declare LVDS register values.Vladimir Serbinenko
Change-Id: If8b3578c4fa31bf9f09c0053a5cac7ebc993b634 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5319 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-03-09intel/gma: Remove MCH register declarations.Vladimir Serbinenko
i915_reg.h re-declares some of MCH registers as seen through MCHBAR mirror. It's not currently used and we don't want any MCH registers in GFX. Change-Id: I5fa4711fee60d64316696b7ed713013de8759b54 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5318 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-03-04nehalem: Replace video init.Vladimir Serbinenko
Old video init just replayed the sequence. This one actually computes the values. Change-Id: Ic1fe7a2e90dc2cc36ac0d8bcea5cfabc583f09a3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5270 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-03-04drivers/intel/gma: Add EDID retrieving functions.Vladimir Serbinenko
Change-Id: I64f2fcc5ad52d6a0188d02b28769001ada718c4f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5278 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2013-12-21Refactor code containing aux callsFurquan Shaikh
Moved a lot of code from i915io.c to intel_dp.c with specific function calls Change-Id: Ib2ed52b4f73ee0076e2dd68a26541e5bbe1366bc Reviewed-on: https://gerrit.chromium.org/gerrit/63950 Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4429 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21Slippy/Falco: Fill in right values for PHSYNC and PVSYNC in transcoder flagsFurquan Shaikh
Depending upon the values decoded from edid, the function decides the appropriate bits to be set in flags parameter (Important for fastboot to work correctly in kernel) Change-Id: I3b0f914dc2b0fd887eb6a1f706f87b87c86ff856 Reviewed-on: https://gerrit.chromium.org/gerrit/64265 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4423 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21Add cpu transcoder attribute to intel dpFurquan Shaikh
Also, used this attribute in the calculation of htotal and other registers Added intel_dp_* functions for m,n registers and dimension register calculations Change-Id: I99dd7156700d59b0b4c85e34c9aa1c6408c7f31a Reviewed-on: https://gerrit.chromium.org/gerrit/64001 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4422 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21Calculate transcoder flags based on pipe configFurquan Shaikh
Works fine with all three panels with the change of 6 bits per color. Change-Id: Ia47d152e62d1879150d8cf9a6657b62007ef5c0e Reviewed-on: https://gerrit.chromium.org/gerrit/63762 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4402 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21FUI: Fill in link_m and link_n valuesFurquan Shaikh
... based on the EDID detailed timing values for pixel_clock and link_clock. Two undocumented registers 0x6f040 and 0x6f044 correspond to link_m and link_n respectively. Other two undocumented registers 0x6f030 and 0x6f034 correspond to data_m and data_n respectively. Calculations are based on the intel_link_compute_m_n from linux kernel. Currently, the value for 0x6f030 does not come up right with our calculations. Hence, set to hard-coded value. Change-Id: I40ff411729d0a61759164c3c1098504973f9cf5e Reviewed-on: https://gerrit.chromium.org/gerrit/62915 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4381 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21SLIPPY: final changes for FUIRonald G. Minnich
The intel_ddi.c change I thought should be in but I don't see it. It just adds two functions back that we need. There are two new files for slippy annotated with comments about how it needs to evolve. That said, this code has been tested on 3 different panels. Both dev and non-dev usages work. physbase initialization to static value removed. Moved spin calls to intel_dp_* Change-Id: I0480af45c21c7dedcaff7e8be729f0eb554ec78a Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/61136 Commit-Queue: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Tested-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4370 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2013-12-07Add kernel-derived support functions for DDI.Ronald G. Minnich
Newer mainboards that use haswell -- and, presumably, chipsets to come -- need some support functions. Add them in the drivers/intel/gma directory. Currently, this is one file: intel_ddi.c, but more may come. Compilation of this file is controlled by INTEL_DDI, defined in the Kconfig as default n and used in the Makefile.inc Change-Id: I501ee291c0d4589925ed3e478f67106337fcad31 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/60612 Tested-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Ronald G. Minnich <rminnich@chromium.org> Reviewed-on: http://review.coreboot.org/4337 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-12-05FUI: add intel_dp driver derived from kernel functionsRonald G. Minnich
These functions are not all used yet, but do compile and are partially used in the FUI testing. They were extracted from the 3.4 kernel using coccinnelle filters. The .c files are only compiled in if CONFIG_INTEL_DP is set. Change-Id: Id95622a75aa02b496c9ea4717cb143394a8332e3 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/60245 Commit-Queue: Ronald G. Minnich <rminnich@chromium.org> Tested-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4329 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-05haswell: pull in the init code for FUIRonald G. Minnich
Removed two unnecessary register sets, and did the power well a bit more correctly. Also, added a register definition include file so we can used constants instead of magic numbers. We also set registers to common initialized values that are needed for FUI, VBIOS, and kernel. This set of registers appears to be an absolute bare minimum. Since we're hoping to use FUI for all chipsets from this one forward, we unconditionally do the setting here. Signed-off-by: Ronald G. Minnich <rminnich@google.com> Change-Id: Ife3f661ba010214d92b646b336f2b06645119f17 Reviewed-on: https://gerrit.chromium.org/gerrit/59988 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Ronald G. Minnich <rminnich@chromium.org> Tested-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-on: http://review.coreboot.org/4328 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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