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path: root/src/drivers/intel/fsp1_1
AgeCommit message (Expand)Author
2016-08-10drivers/intel/fsp1_1: Add fsp_write_line functionLee Leahy
2016-08-06drivers/intel/fsp1_1: only set a base address for FSP in COREBOOT CBFSAaron Durbin
2016-07-31src/drivers: Capitalize CPU, RAM and ACPIElyes HAOUAS
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-07-28intel/fsp1_1: Add C entry support to locate FSP Temp RAM InitSubrata Banik
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-15drivers/intel/fsp1_1: align on using ACPI_Sx definitionsAaron Durbin
2016-07-10intel post-car: Consolidate choose_top_of_stack()Kyösti Mälkki
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-03drivers/intel/fsp1_1: Make weak routines quietLee Leahy
2016-06-03Add Board Checklist SupportLee Leahy
2016-06-02drivers/intel/fsp1_1: Update weak MRC cache routinesLee Leahy
2016-05-17drivers/intel/fsp1_1: Simplify union referencesLee Leahy
2016-05-17drivers/intel/fsp1_1: Replace for/break with returnsLee Leahy
2016-05-11cbfstool/fsp: Rename fsp1_1_relocateFurquan Shaikh
2016-05-11util/cbfstool: Allow xip/non-xip relocation for FSP componentFurquan Shaikh
2016-05-09lib/prog_loaders: Allow platforms to skip stage cacheFurquan Shaikh
2016-05-04soc/intel/common/mrc_cache: Honor MRC data as a constant pointerAlexandru Gagniuc
2016-05-02drivers/intel/fsp1_1: fix linking romstage when SEPARATE_VERSTAGE usedAaron Durbin
2016-04-19kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ schemeStefan Reinauer
2016-03-29intel/fsp1_1: Do not re-init TPM in romstage if already setup in verstageDuncan Laurie
2016-03-14intel/fsp1.1: Mark graphics init done after SiliconInit phaseDuncan Laurie
2016-02-14Intel common: add microcode loading to romstage before fspmemoryinitrobbie zhang
2016-02-08drivers/intel/fsp1_1: Make fsp_run_silicon_init publicLee Leahy
2016-02-02soc/intel/common: Use SoC specific routine to read/write MTRRsLee Leahy
2016-01-31drivers/intel/fsp1_1: Fix spelling error in API and copyrightLee Leahy
2016-01-29intel/skylake: Implement native Cache-as-RAM (CAR)Subrata Banik
2016-01-28drivers/intel/fsp1_1: Remove extra include referencesLee Leahy
2016-01-27drivers/intel/fsp1_1: Enable builds without MRC cacheLee Leahy
2016-01-22intel/fsp1_1: Fix for passing VBT when vboot requests itDuncan Laurie
2016-01-19intel/skylake: do not save MRC data in recovery modeharidhar
2016-01-18intel/fsp1_1: Fix enumeration timestamp and post codeLee Leahy
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-10fsp1_1: Remove #if protection in header - It's not neededMartin Roth
2016-01-07intel/fsp1_1: Disable GOP support by defaultMartin Roth
2015-12-11fsp1_1: supply fsp version to mrc_cache APIAaron Durbin
2015-12-10lib: remove assets infrastructureAaron Durbin
2015-12-10cbfs/vboot: remove firmware component supportAaron Durbin
2015-12-03intel/fsp: Add post codes for FSP phasesDuncan Laurie
2015-12-03intel/fsp1_1: Add accurate print for full fsp versionDhaval Sharma
2015-12-02drivers/intel/fsp1_1: Don't hide build related options behind HAVE_FSP_BINStefan Reinauer
2015-11-23drivers/intel/fsp1_1: Don't include files from blobs / fsp directoryStefan Reinauer
2015-11-23drivers/intel/fsp1_1: Include rules.h in util.hStefan Reinauer
2015-11-20intel: Add MMA feature in corebootPratik Prajapati
2015-11-05fsp1_1: pass ROM_SIZE to FSP for cacheable RO regionAaron Durbin
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27FSP1_1: Always use common codeLee Leahy
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-27fsp/intel common: Add support for Gfx PEIM (AKA GOP)robbie zhang
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-14fsp1_1: add verstage supportAaron Durbin
2015-10-11intel fsp1_1: prepare for romstage vboot verification splitAaron Durbin
2015-10-11intel: update common and FSP cache-as-ram parametersAaron Durbin
2015-10-02fsp1_1: move relocation algorithm to commonlibAaron Durbin
2015-10-02fsp1_1: use commonlib/endian.h routinesAaron Durbin
2015-09-22coreboot: introduce commonlibAaron Durbin
2015-09-17drivers/intel/fsp1_1: split relocation code for tool useAaron Durbin
2015-09-17drivers/intel/fsp1_1: handle UEFI endiannessAaron Durbin
2015-09-17drivers/intel/fsp1_1: prepare relocation code for sharingAaron Durbin
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-10FSP: Pass FSP image base address to find_fspLee Leahy
2015-09-08drivers/intel/fsp1_1: Take platform ID as a string, not integersAlexandru Gagniuc
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
2015-08-31drivers/intel/fsp1_1/fsp_util.c: Use ALIGN_UP_macroAlexandru Gagniuc
2015-08-31drivers/intel/fsp_1_1: Remove useless #ifndef/#error pairsAlexandru Gagniuc
2015-08-29intel/fsp1_1/hob.c: Refactor file to match coreboot coding styleAlexandru Gagniuc
2015-08-29drivers/intel/fsp1_1: Don't compile GOP support in romstageAlexandru Gagniuc
2015-08-29fsp1_1: remove duplicate mrc caching mechanismAaron Durbin
2015-08-14fsp1_1: fsp_relocate: use struct region_device and struct progAaron Durbin
2015-07-10FSP 1.1: Update the CBFS image typeLee Leahy
2015-06-27Kconfig: Remove unnecessary and incorrect MRC_CACHE symbolsMartin Roth
2015-06-25Intel FSP 1.1: Move Kconfig comment inside 'if' blockMartin Roth
2015-06-24FSP 1.1: Bring source up-to-dateLee Leahy
2015-06-02Hide PLATFORM_USES_FSP1_1.Vladimir Serbinenko
2015-06-02cbfs: new API and better program loadingAaron Durbin
2015-05-28Remove address from GPLv2 headersPatrick Georgi
2015-05-23drivers/intel: Update FSP 1.1 DriverLee Leahy
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-12FSP 1.1 Comparison BaseLee Leahy