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2015-09-17drivers/intel/fsp1_1: handle UEFI endiannessAaron Durbin
UEFI defines everything as little endian. Additionally the EDK II header files assume they are used on machines which are running UEFI -- thus little endian. This patch attempts to fix up all the possible endian violations when running on a big endian machine. This is for in preparation of using the FSP 1.1 code in userland for relocating FSP images. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted glados. Change-Id: I39f4de84688e48978a4650303b8af8345f44fd03 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3c7eab9b7c10765355feffa3c3cac403275f9479 Original-Change-Id: I33a7661281307cf31ae33899d1a4eb6a2fbd01a1 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/298832 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/11664 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-17drivers/intel/fsp1_1: prepare relocation code for sharingAaron Durbin
In order to integrate fsp 1.1 relocation with cbfstool one needs to be able to supply the address to relocate the FSP image. Therefore, allow this by returning offset for return values. Note that exposed API has not changed. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted glados. Confirmed relocation values matched. Change-Id: I650a08ffb9caf7e0438a988cae9bec56dd31753c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 53870b0df809418e9a09e7d380ad2399a09fb4fb Original-Change-Id: Ic2ec63681ed4e652e2624b40e132f95d1e5a0887 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/298831 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/11663 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
FSP has some unique attributes which makes integration cumbersome: 1. FSP header files do not include the types they need. Like EDKII development it's expected types are provided by the build system. Therefore, one needs to include the proper files to avoid compilation issues. 2. An implementation of FSP for a chipset may use different versions of the UEFI PI spec implementation. EDKII is a proxy for all of UEFI specifications. In order to provide flexibility one needs to binding a set of types and structures from an UEFI PI implementation. 3. Each chipset FSP 1.1 implementation has a FspUpdVpd.h file which defines it's own types. Commonality between FSP chipset implementations are only named typedef structs. The fields within are not consistent. And because of FSP's insistence on typedefs it makes it near impossible to forward declare structs. The above 3 means one needs to include the correct UEFI type bindings when working with FSP. The current implementation had the SoC picking include paths in the edk2 directory and using a bare <uefi_types.h> include. Also, with the prior fsp_util.h implementation the SoC's FSP FspUpdVpd.h header file was required since for providing all the types at once (Generic FSP 1.1 and SoC types). The binding has been changed in the following manner: 1. CONFIG_UEFI_2_4_BINDING option added which FSP 1.1 selects. No other bindings are currently available, but this provides the policy. 2. Based on CONFIG_UEFI_2_4_BINDING the proper include paths are added to the CPPFLAGS_common. 3. SoC Makefile.inc does not bind UEFI types nor does it adjust CPPFLAGS_common in any way. 4. Provide a include/fsp directory under fsp1_1 and expose src/drivers/intel/fsp1_1/include in the include path. This split can allow a version 2, for example, FSP to provide its own include files. Yes, that means there needs to be consistency in APIs, however that's not this patch. 5. Provide a way for code to differentiate the FSP spec types (fsp/api.h) from the chipset FSP types (fsp/soc_binding.h). This allows for code re-use that doesn't need the chipset types to be defined such as the FSP relocation code. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted on glados. Signed-off-by: Aaron Durbin <adubin@chromium.org> Change-Id: I894165942cfe36936e186af5221efa810be8bb29 Reviewed-on: http://review.coreboot.org/11606 Reviewed-by: Duncan Laurie <dlaurie@google.com> Tested-by: build bot (Jenkins)
2015-09-10FSP: Pass FSP image base address to find_fspLee Leahy
Add a parameter to find_fsp which is the image base address. Adjust the fake stack in cache_as_ram.inc to pass in the read-only FSP image base address. In fsp_notify, pass in the read-only FSP image base address when the FSP header pointer is NULL. In find_fsp, validate the FSP binary image starting from the specified image base address. BRANCH=none BUG=None TEST=Build and run on Skylake Change-Id: Iac43c8aac8491390479af551765b514ca919928a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 592dae53f3b32694190cc5cb0fa6ca94df68aa95 Original-Change-Id: I7d6a415458a81f3b6bcdcfc9a90eceb2ac22144e Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/295593 Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11545 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-09-08drivers/intel/fsp1_1: Take platform ID as a string, not integersAlexandru Gagniuc
The platform ID is an 8 character ASCII string, so our config should take it in as a string, rather than a set of two 32-bit integers. Change-Id: I76da85fab59fe4891fbc3b5edf430f2791b70ffb Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11465 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
The BOOT_STATE_INIT_ENTRY macro can only be used in ramstage, however the current state of the header meant bad build errors in non-ramstage. Therefore, people had to #ifdef in the source. Remove that requirement. Change-Id: I8755fc68bbaca6b72fbe8b4db4bcc1ccb35622bd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11492 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-08-31drivers/intel/fsp1_1/fsp_util.c: Use ALIGN_UP_macroAlexandru Gagniuc
Change-Id: Iac4f275c14646b40ffe04fc5a6f6e1402cebfddf Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11464 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-31drivers/intel/fsp_1_1: Remove useless #ifndef/#error pairsAlexandru Gagniuc
The #error messages only say that "CONFIG_* must be defined", which conveys no more information that the compiler or assembler failing when it encounters an undefined CONFIG_* symbol. Change-Id: I6058474d4cd454cfc20290650425d379f388abd9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11461 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-29intel/fsp1_1/hob.c: Refactor file to match coreboot coding styleAlexandru Gagniuc
Avoid ASSERT() when a better solution exists, avoid UPPERCASE types when C99 types exist, and use stdlib functions where possible. Change-Id: Ia40ec8ff34ec82994b687d517dc4b145fb58716c Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11455 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-29drivers/intel/fsp1_1: Don't compile GOP support in romstageAlexandru Gagniuc
We don't need the code in romstage, and it saves us a few #ifdefs. Change-Id: I26d867566f07c7d80890cd01bf055be7497130d3 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11457 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-29fsp1_1: remove duplicate mrc caching mechanismAaron Durbin
For some reason fsp 1.1 has a duplicate mechanism for saving mrc data as soc/intel/common. Defer to the common code as all the existing users were already using the common code. BUG=chrome-os-partner:44620 BRANCH=None TEST=Built and booted glados. Suspended and resumed. Change-Id: I951d47deb85445a5f010d23dfd11abb0b6f65e5e Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Original-Commit-Id: 2138b6ff1517c440d24f72a5f399bd6cb6097274 Original-Change-Id: I06609c1435b06b1365b1762f83cfcba532eb8c7a Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/295236 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/11454 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2015-08-14fsp1_1: fsp_relocate: use struct region_device and struct progAaron Durbin
Using struct prog and struct region_device allows for the caller to be none-the-wiser about where FSP gets placed. It also allows for the source location to be abstracted away such that it doesn't require a large mapping up front to do the relocation. Lastly, it allows for simplifying the intel/commmon FSP support in that it can pass around a struct prog. BUG=chrome-os-partner:43636 BRANCH=None TEST=Built, booted, suspended, and resumed on glados. Original-Change-Id: I034b04ab2b7e9e01f5ee14fcc190f04b90517d30 Original-Signed-off-by: Aaron Durbin <adurbin@chroumium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290830 Original-Tested-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> Change-Id: Ibe1f206a9541902103551afaf212418fcc90e73c Signed-off-by: Aaron Durbin <adurbin@chroumium.org> Reviewed-on: http://review.coreboot.org/11193 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-10FSP 1.1: Update the CBFS image typeLee Leahy
Update Makefile.inc to use the simplified CBFS image type. BRANCH=none BUG=None TEST=Build and run on cyan Change-Id: Ibb8413ab90b147e9d26d32639a8822c57ca54a46 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10871 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2015-06-27Kconfig: Remove unnecessary and incorrect MRC_CACHE symbolsMartin Roth
Because of a misunderstanding of how Kconfig files are parsed, the OVERRIDE_MRC_CACHE_LOC symbol was added to make sure that the value was correctly set. This is not needed unless for some reason the Kconfig parser is suddenly rewritten to parse everything differently. At some point, the value in the FSP's Kconfig file was updated to OVERRIDE_CACHE_CACHE_LOC, while the entries in the mainboard Kconfig files were not updated. This resulted in the default values not getting set correctly by default on the FSP Bay Trail boards. This removes the whole bunch of incorrect and unnecessary symbols and just sets the default for the MRC cache location directly. Change-Id: I1cec758576866b7e0677272b8309bfde8d4a1ee4 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10611 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-25Intel FSP 1.1: Move Kconfig comment inside 'if' blockMartin Roth
- Move the 'Intel FSP' Kconfig comment inside the 'if' block so that it doesn't show up on platforms that aren't using it. - Update the comment to reflect that this is version 1.1 of the FSP interface. Change-Id: I7182c5b07332c4f95620f7374526ab1de0484d01 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10650 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
2015-06-24FSP 1.1: Bring source up-to-dateLee Leahy
Use 3rdparty/blobs subdirectory for binary files Display the MTRRs after TempRamExit and before the MTRR setup Clear all of the variable MTRRs before the MTRR setup Define the FSP attributes location and bits Properly display the FSP_RESERVED_MEMORY_RESOURCE_HOB and the FSP_BOOTLOADER_TOLUM_HOB. BRANCH=none BUG=None TEST=Build and run on cyan Change-Id: I788a5f1e7676b1a06c1bcd66ddbd0a2249cad47c Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10589 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-02Hide PLATFORM_USES_FSP1_1.Vladimir Serbinenko
This should be an internal selectable variable rather than user-visible config. Moreover the description is misleading. This is a typical case of an option "Should it work?" where there is only one right answer yet we still ask it. Change-Id: Idc0ce2e1b9f89eddd034966cc877483d994ce0eb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10378 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-02cbfs: new API and better program loadingAaron Durbin
A new CBFS API is introduced to allow making CBFS access easier for providing multiple CBFS sources. That is achieved by decoupling the cbfs source from a CBFS file. A CBFS source is described by a descriptor. It contains the necessary properties for walking a CBFS to locate a file. The CBFS file is then decoupled from the CBFS descriptor in that it's no longer needed to access the contents of the file. All of this is accomplished using the regions infrastructure by repsenting CBFS sources and files as region_devices. Because region_devices can be chained together forming subregions this allows one to decouple a CBFS source from a file. This also allows one to provide CBFS files that came from other sources for payload and/or stage loading. The program loading takes advantage of those very properties by allowing multiple sources for locating a program. Because of this we can reduce the overhead of loading programs because it's all done in the common code paths. Only locating the program is per source. Change-Id: I339b84fce95f03d1dbb63a0f54a26be5eb07f7c8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9134 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-28Remove address from GPLv2 headersPatrick Georgi
Follow up for commit b890a12, some contributions brought back a number of FSF addresses, so get rid of them again. Change-Id: I0ac0c957738ce512deb0ed82b2219ef90d96d46b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10322 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-05-23drivers/intel: Update FSP 1.1 DriverLee Leahy
Update the FSP driver files from 1.0 to 1.1. Updates will occur manually to these files only for FSP 1.1 support. An fsp_x_y should be added in the future to support newer versions of the FSP specification. Please note that due to the interface with EDK2, these files make references to data structures and fields that use CamelCase. BRANCH=none BUG=None TEST=Build for Braswell or Skylake boards using FSP 1.1. Change-Id: I2914c047d786a3060075356783ac9758bc41f633 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10049 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-12FSP 1.1 Comparison BaseLee Leahy
Add FSP 1.0 source for comparison with FSP 1.1. BRANCH=none BUG=None TEST=None Change-Id: I8df349f97acfa74f4de3607d49633da3d4884546 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10116 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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