coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-07-14	src: Remove unused 'include <stdint.h>	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	src/drivers: Use SPDX for GPL-2.0-only files	Angel Pons
2019-12-19	src: Remove unused 'include <arch/cpu.h>'	Elyes HAOUAS
2019-10-22	AUTHORS: Move src/drivers/[a-i] copyrights into AUTHORS file	Martin Roth
2019-06-12	{drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support	Frans Hendriks
2019-06-04	soc/intel/braswell: Use common cpu/intel/car code	Arthur Heymans
2019-05-29	soc/intel/skylake: Use common cpu/intel/car romstage code	Arthur Heymans
2019-05-21	soc/intel/fsp1.1: Implement postcar stage	Arthur Heymans
2017-01-19	driver/intel/fsp1_1: Fix boot failure for non-verstage case	Teo Boon Tiong
2016-07-31	src/drivers: Capitalize CPU, RAM and ACPI	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-14	fsp1_1: add verstage support	Aaron Durbin
2015-10-11	intel fsp1_1: prepare for romstage vboot verification split	Aaron Durbin