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2024-05-29tree: Use <stdio.h> for snprintfElyes Haouas
<stdio.h> header is used for input/output operations (such as printf, scanf, fopen, etc.). Although some input/output functions can manipulate strings, they do not need to directly include <string.h> because they are declared independently. Change-Id: Ibe2a4ff6f68843a6d99cfdfe182cf2dd922802aa Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82665 Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-05-17cr50: Replace "cr50" to "GSC" in debug messagesTyler Wang
The cr50.c file currently prints "cr50" in debug messages no matter the system is using Cr50 or Ti50. This can be confusing for developers. This patch replaces "cr50" with "GSC" in debug messages. Using "GSC" makes the messages more clear and easier to search via `grep`. BUG=none TEST=Build and test on karis Change-Id: I21f66cf8b608ca4e4dc82d7a55a851ec996c8bb3 Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82420 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Jon Murphy <jpmurphy@google.com>
2024-04-24drivers/i2c/rt5645: Add RT5645 amp driverJianeng Ceng
RT5663 is very old and it was used the hard code like RT53 or 10EC5663, which is the different series from RT5645/5650, it may caused some ambiguity. Because I2C generic driver dose not support dsd gpio setting, we declared the new rt5645 series driver for expansion. Add RT5645 AMP support. The kernel driver of 5650 is written in rt5645.c. Add acpi name cbj-sleeve-gpios for power gate GPIO. ALC5650 DataSheet Rev 0.93 Realtek upstream link: https://lore.kernel.org/all/20240404035747.118064-1-derek.fang@realtek.com/ Hide the device because of Microsoft Windows. BUG=None TEST=verified in anraggar and probe device rt5650 succeed ``` \_SB.PCI0.I2C3.RT58: Realtek RT5650 ``` Change-Id: I602fcc4dd8576043943f6e20884edc4703350320 Signed-off-by: Jianeng Ceng <cengjianeng@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81773 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2024-04-19acpi: Make acpi_device_write_dsd_gpio() publicJianeng Ceng
Make sure it can be used for other driver. At present, i2c_generic_write_gpio() is not suitable for being called by other drivers, so delete it, add acpi_device_write_dsd_gpio() to replace it, and make it public. BUG=None TEST= Build BIOS FW pass and it can be use for other driver. Change-Id: Ifb2e60690711b39743afd455c6776c5ace863378 Signed-off-by: Jianeng Ceng <cengjianeng@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81788 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
2024-04-16security/tpm: support compiling in multiple TPM driversSergii Dmytruk
Starting from here CONFIG_TPM1 and CONFIG_TPM2 are no longer mutually exclusive. Change-Id: I44c5a1d825afe414c2f5c2c90f4cfe41ba9bef5f Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69162 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-04-12tree: Drop duplicated <device/{path,resource}.h>Elyes Haouas
<device/device.h> is supposed to provide <device/{path,resource}.h> Change-Id: I2ef82c8fe30b1c1399a9f85c1734ce8ba16a1f88 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
2024-04-11tree: Remove blank lines before '}' and after '{'Elyes Haouas
Change-Id: I46a362270f69d0a4a28e5bb9c954f34d632815ff Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81455 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2024-03-28security/tpm: make tis_probe() return tpm_familySergii Dmytruk
Via an out parameter. This is needed to be able to dynamically pick TSS implementation based on the information discovered on probing. Change-Id: I5006e0cdfef76ff79ce9e1cf280fcd5515ae01b0 Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69159 Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-03-23drivers/i2c/tas5825m: Allow using I2C busTim Crawford
The latest Clevo boards connect the TAS5825M to one of the I2C connections instead of the SMBus connection. The I2C ops are compatible with SMBus, so always use them. Tested on system76/oryp6 (uses SMBus) and in-development system76/oryp12 (uses I2C3). TAS5825M init is successful and speaker output works. Change-Id: I2233d6977fd460b53e27260cdfabe42e30b98041 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
2024-02-21i2c/drivers/generic: Add support for including a rotation matrixSean Rhodes
The Rotation Matrix allows the specification of a 3x3 matrix representing the orientation of devices, such as accelerometers. Each value in the matrix can be one of -1, 0, or 1, indicating the transformation applied to the device's axes. It is expected by Linux and required for the OS to interpret the data from the device correctly. It is used by various drivers, mainly in `iio/accel`. It was tested on Ubuntu, by rotating the device and verifying the orientation was correct. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id4a940d999a0e300a6fe21269f18bab6e3c0523c Reviewed-on: https://review.coreboot.org/c/coreboot/+/80179 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2024-02-18drivers: Add SPDX license headers to Kconfig filesMartin Roth
Change-Id: Ib27894f0f1e03501583fffb2c759b493d6a7b945 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80588 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-01-31device/device.h: Rename busses for clarityArthur Heymans
This renames bus to upstream and link_list to downstream. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2024-01-31include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard
Macros can be confusing on their own; hiding commas make things worse. This can sometimes be downright misleading. A "good" example would be the code in soc/intel/xeon_sp/spr/chip.c: CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev, This appears as CHIP_NAME() being some struct when in fact these are defining 2 separate members of the same struct. It was decided to remove this macro altogether, as it does not do anything special and incurs a maintenance burden. Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0 Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Jakub Czapiga <czapiga@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
2024-01-24driver/i2c: Rename Makefiles from .inc to .mkMartin Roth
The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I358b878b97adfd9be156a5dd4a9cbaf9e81bca1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/80078 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2023-11-13security/tpm/: turn tis_{init,open} into tis_probeSergii Dmytruk
init() was always followed by open() and after successful initialization we only need send-receive function which is now returned by tis_probe() on success, thus further reducing number of functions to export from drivers. This also removes check for opening TIS twice that seems to have no value. Change-Id: I52ad8d69d50d449f031c36b15bf70ef07986946c Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76954 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-11-08drivers/i2c/lenovo_serials: Use buildtime constantsArthur Heymans
The coreboot_version global variable just gets filled with the COREBOOT_VERSION macro so there is no reason to use a runtime strconcat. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I3a2be7293d07ac591855ebd784bba350cdffa70f Reviewed-on: https://review.coreboot.org/c/coreboot/+/78945 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-09-28drivers/tpm: Add return codes to TPM driverJon Murphy
Add additional failure mode reporting to the TPM driver to provide additional visibility into what failures are occurring. BUG=b:296439237 TEST=Verify code paths on Skyrim, ensure behavior is unchanged. BRANCH=None Change-Id: I77a653201acf1bddc1ed1e2af701c8d3dd4f0606 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77491 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jan Samek <jan.samek@siemens.com>
2023-09-28treewide: convert to tpm_result_tJon Murphy
Convert TPM functions to return TPM error codes(referred to as tpm_result_t) values to match the TCG standard. BUG=b:296439237 TEST=build and boot to Skyrim BRANCH=None Change-Id: Ifdf9ff6c2a1f9b938dbb04d245799391115eb6b1 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77666 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-09-28treewide: convert to %#x hex printsJon Murphy
Convert hex print values to use the %#x qualifier to print 0x{value}. BUG=b:296439237 TEST=build and boot to Skyrim BRANCH=None Change-Id: I0d1ac4b920530635fb758c5165a6a99c11b414c8 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78183 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-09-18drivers/tpm: Make temp test value naming consistentJon Murphy
Make naming convention consistent across all functions return values. BUG=b:296439237 TEST=Boot to OS on Skyrim BRANCH=None Change-Id: If86805b39048800276ab90b7687644ec2a0d4bee Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77536 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-09-08arch to drivers/intel: Fix misspellings & capitalization issuesMartin Roth
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ic52f01d1d5d86334e0fd639b968b5eed43a35f1d Reviewed-on: https://review.coreboot.org/c/coreboot/+/77633 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-11drivers/i2c/sx9310: Set ACPI status to hidden (0xb)Matt DeVillier
Set the ACPI device status to hidden, since no driver is necessary or available under Windows. Linux is unaffected as it does not use the ACPI device status. TEST=build/boot Win11 on google/akemi Change-Id: Ib1e274084400fa47e483267d331e632ceb5be757 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75178 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-06drivers: Add SPDX license headers to MakefilesMartin Roth
To help identify the licenses of the various files contained in the coreboot source, we've added SPDX headers to the top of all of the .c and .h files. This extends that practice to Makefiles. Any file in the coreboot project without a specific license is bound to the license of the overall coreboot project, GPL Version 2. This patch adds the GPL V2 license identifier to the top of all makefiles in the drivers directory that don't already have an SPDX license line at the top. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8442bc18ce228eca88a084660be84bcd1c5de928 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68980 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Tim Crawford <tcrawford@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-07-31drivers/i2c/generic: Add option to set ACPI subsystem IDMatt DeVillier
Change-Id: I7c9c938bd20d36be8fdfb0d95bb58a7259650693 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2023-07-06drivers/tpm: Move tis_plat_irq_status to cr50 driverGrzegorz Bernacki
tis_plat_irq_status() function is used only by Google TPM. It should be moved to drivers/tpm/cr50.c. The name of the function was changed to cr50_plat_irq_status(). BUG=b:277787305 TEST=Build all affected platforms Change-Id: I78dc39f2c7b44232b06947d3dfe6afa52807ced8 Signed-off-by: Grzegorz Bernacki <bernacki@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75917 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2023-06-15drv/i2c/pi608gp: Fix styleJan Samek
In commit e59f18bf29a8 ("drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)"), there were some suggestions after it's been already merged. This patch addresses the points regarding the code style and comments. BUG=none TEST=Build OK, no behavioral changes in the pi608gp driver, console logs without changes. Change-Id: I5fc54708e0085fea4bd1f2fbf2afb400d2ccbd46 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-06-15drv/i2c/pi608gp: Fix typesJan Samek
In commit e59f18bf29a8 ("drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)"), there were some suggestions after it's been already merged. This patch addresses the points regarding the number types - fix of the printk format strings, inclusion of 'stdint.h' and marking the set of allowed values as constant. BUG=none TEST=Build OK, no behavioral changes in the pi608gp driver, console logs without changes. Change-Id: I34c664f6a8a257b260facdbf9043825ff4a4c932 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75500 Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2023-05-26treewide: Remove 'extern' from functions declarationElyes Haouas
"extern" is automatically implied with function declaration. Change-Id: Ic40218acab5a009621b6882faacfcac800aaf0b9 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71890 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-05-08drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)Jan Samek
This patch adds some of the variety of configuration options exported by the Pericom Inc. PI7C9X2G608GP PCIe switch over its SMBus interface. Currently implemented options are only used to adjust the switch upstream port amplitude and de-emphasis levels in millivolts. Only values specified in the switch datasheet (in tables 6-6 and 6-8) are allowed. Example of a devicetree.cb entry: chip drivers/i2c/pi608gp register "gen2_3p5_enable" = "true" register "gen2_3p5_amp" = "AMP_LVL_MV(425)" register "gen2_3p5_deemph" = \ "DEEMPH_LVL_MV(37, 5)" device i2c 0x6f on ops pi608gp_ops end end Link to the datasheet: https://web.archive.org/web/20210225074853/https://www.diodes.com/assets/Datasheets/PI7C9X2G608GP.pdf BUG=none TEST=Create devicetree.cb and Kconfig entries for this driver in a mainboard containing the switch and verify, that the values read out from the switch config space match the values programmed over the SMBus. Change-Id: Id191c4e97b99da58efd3ba38bf8cca3603ece4d5 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2023-05-05vc/google: Decouple DSM_CALIB from CHROMEOSMatt DeVillier
DSM (Dynamic Speaker Management) uses calibration parameters stored in a VPD (Vital Product Data) FMAP region to configure the audio output via an ACPI _DSD table. This has no dependency on a ChromeOS, and can be used by Linux/Windows drivers if appropriately configured. Remove the dependency of DSM_CALIB (and the calibration file) on CHROMEOS and replace it with VPD, so that non-CHROMEOS builds can utilize this feature as well. Move files from underneath vc/google/chromeos to underscore the point. TEST=build/boot google/nightfury, dump ACPI, verify DSM calibraton parameters present in _DSD table. Change-Id: I643b3581bcc662befc9e30736dae806f94b055af Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74812 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-05-05Convert literal uses of CONFIG_MAINBOARD_{VENDOR,PART_NUMBER}Kyösti Mälkki
Only expand these strings in lib/identity.o. Change-Id: I8732bbeff8cf8a757bf32fdb615b1d0f97584585 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74907 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-04-28treewide: Add missing include guards to chip.hJan Samek
Some of the chip.h files in the tree are missing the include guards. This patch adds them in order to avoid potential redefinions of symbols contained in these headers, when they are included multiple times in static.c generated by sconfig. Change-Id: I550a514e72a8dd4db602e7ceffccd81aa36446e3 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-03-03drv/i2c/ptn3460: Add 'mainboard' prefix to mainboard-level callbacksJan Samek
As discused earlier, the callback name 'mb_adjust_cfg' was considered too generic. The new naming is chosen to be consistent with other drivers' callback names designed to be used at mainboard level. Also other functions, namely 'mb_get_edid' and 'mb_select_edid_table' are renamed accordingly. BUG=none TEST=Builds for siemens/mc_apl{1,4,5,7} and siemens/mc_ehl boards complete successfully. Change-Id: I4cbec0e72e5f03e94df0faa36765d1a6cd873a7a Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2023-02-14drivers/i2c/nau8825: Fix typo: deboune -> debounceMatt DeVillier
Allows Windows/Linux driver to use the proper jack eject debounce time. Credit to coolstar for identifying the issue. Change-Id: I32b94b9285f7c85ff1d67b3d78c845835bbf90d7 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-02-02drv/i2c/ptn3460: Use PTN_EDID_LEN instead of constantJan Samek
Contents of the EDID are passed by a reference to an array of length 0x80, for which the macro 'PTN_EDID_LEN' has already been around. This patch makes use of this macro within the driver and mainboard implementation utilizing it. BUG=none TEST=A successful build of mc_apl{1,4,5,7} and mc_ehl3 mainboards. Change-Id: If7d254aaf45d717133bb426bd08f8f9fe5c05962 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72653 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2023-01-27drivers/i2c/ptn3460: Use cb_err in mb_adjust_cfgJan Samek
Return generic coreboot error codes from the mb_adjust_cfg callback used in mainboards instead of '-1' constant and a driver-specific success-indicating define. BUG=none TEST=Boards siemens/mc_apl{1,4,5,7} and siemens/mc_ehl3 build correctly. Change-Id: I5e0d4e67703db518ed239a845f43047f569b94ec Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72071 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2023-01-15drivers/i2c/generic: Drop 'disable_gpio_export_in_crs' flagMatt DeVillier
Exposing the GPIOs via an ACPI PowerResource and the _CRS results in the OS driver and ACPI thinking they own the GPIO. This can cause timing problems because it's not clear which system should be controlling the GPIO. Previously, we flagged as an error any device which set the 'has_power_resource' flag but did not set 'disable_gpio_export_in_crs.' There's no reason to require explicit disablement however, so drop the superfluous 'disable' flag, and change the _CRS generation to check if the GPIOs will be exported via the 'has_power_resource' flag instead. BUG=b:265055477 TEST=build/boot skyrim, dump SSDT and verify touchscreen GPIOs only listed under PRx, not under _CRS. Change-Id: I837ae6c6fe4b8e1c4e10686406cba06bdb7759d2 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-01-13drivers/i2c/pca9538/Makefile.inc: Remove unused pathElyes Haouas
Change-Id: I435837381a966b61081d023447a6e7fdfd9a9348 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-23Revert "security/tpm/: turn tis_{init,open} into tis_probe"Sergii Dmytruk
This reverts commit d43154486d27323f64334203e9bc8baf08af6845. From CB:68991: This causes CraterLake boot up process to die. Investigation in progress. Change-Id: I4a6c11b0e638a891108fe230bdaea92d5fbca020 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71205 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: siemens-bot Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-12-23mb/siemens/mc_apl7: Init I2C controller before PTN3460 is initializedWerner Zeh
When PTN3460_EARLY_INIT is selected, the PTN3460 (DP-2-LVDS-bridge) will be initialized before all devices are initialized. This is necessary to get a valid EDID data set into the PTN3460 before the graphic controller is initialized in order to be able to show a splash screen. For ptn3460_init() to work properly the I2C bus this bridge is connected to needs to be initialized. As this I2C bus initialization would be done too late in the normal flow, it needs to be called here explicitly before ptn3460_init() to initialize the I2C bus with the needed conditions. Otherwise the default I2C settings of the controller will be used which results in a clock rate too high for this mainboard. Test=Measure I2C bus signals and make sure that the clock is <= 400 kHz. Change-Id: I1775fb7c2d29f765224d0e7c7ff9fcd4dbf847c5 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71226 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-21security/tpm/: turn tis_{init,open} into tis_probeSergii Dmytruk
Init was always followed by open and after successful initialization we need only send-receive function, which is now returned by tis_probe on success further reducing number of functions to export from drivers. Change-Id: Ib4ce35ada24e3959ea1a518c29d431b4ae123809 Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68991 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-21drivers/i2c/tpm: splice tpm_vendor_specific structSergii Dmytruk
Move `locality` field to `struct tpm_inf_dev` and put the rest directly into `tpm_chip`. Change-Id: Ic3644290963aca9f8dc7cd8ef754352865ef8d2c Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-12-16drivers/i2c/designware: translate return type in dw_i2c_dev_transferFelix Held
dw_i2c_transfer returns an enum cb_err type, but dw_i2c_dev_transfer returns an int, so explicitly translate between the types. Since dw_i2c_transfer only returns either CB_SUCCESS or CB_ERR which are defined as 0 and -1, this won't change behavior of dw_i2c_dev_transfer. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Iaf2cbcf6564035d5c0fc13f5d5e7ac0d0425e85d Reviewed-on: https://review.coreboot.org/c/coreboot/+/70831 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-16drivers/i2c/designware/dw_i2c: handle bus < 0 in dw_i2c_dev_transferFelix Held
dw_i2c_soc_dev_to_bus will return -1 if it failed to find an I2C bus number for a device. In this case return -1 instead of implicitly casting the -1 to an unsigned int and passing that as bus number to dw_i2c_transfer. The dw_i2c_base_address call inside _dw_i2c_transfer already ended up handling this error case correctly, but better handle the error more directly. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I06b6005cee0c5c43855cb5b388a9911fc286c984 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-05security/tpm: remove tis_close()Sergii Dmytruk
This function was never called from outside of drivers and src/drivers/pc80/tpm/tis.c was the only one doing it in a questionable way. tpm_vendor_cleanup() also isn't needed as one of tis_close() functions was its only caller. Change-Id: I9df76adfc21fca9fa1d1af7c40635ec0684ceb0f Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-11-22src/drivers: Remove unnecessary space after castsElyes Haouas
Change-Id: I16689da893b5a0c3254364759d435281cb3e1caf Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69803 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-20drivers/i2c/rx6110sa/chip.h: Remove confusing bus speed commentJan Samek
There is a note about the default I2C speed of this being 400 kHz despite the logic in rx6110sa.c sets the fallback (correctly) to 100 kHz. This information originally comes from the fact the dw_i2c bus controller default speed is 400 kHz. This is irrelevant to the default speed of this device as it can be used with any bus controller. BUG=none TEST=coreboot builds correctly (no functional changes). Change-Id: Ic0ffe5667574c59e1c1df952b84b8a3680b53341 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69545 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-18drivers/i2c/rx6110sa/rx6110sa.c: Make log messages consistentJan Samek
Set the logging message prefix to the device name instead of the device path in order to make the output consistent with other logging messages in this and other drivers. Change-Id: Ib63b93d52aad220d17f1f4ee0d47a949933ec26d Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69718 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2022-11-18drivers/i2c/rv3028c7: Add ACPI generation callbacksJan Samek
Add ACPI generation callback to the driver after obtaining the ACPI HID "MCRY3028" for this device from Microcrystal AG (VID: "MCRY"). Also add I2C bus speed field to the device config structure, which is a required ACPI entry. BUG=none TEST=Disassemble the SSDT table and see whether the device entry "MC28" is generated correctly. Also check whether the RV3028 driver in Linux (drivers/rtc/rtc-rv-3028.c) is bound correctly after adding an ACPI match table to it containing the HID. A proper kernel patch is pending. Change-Id: I3b8cf5c8dc551439755992ff05b6693e91cc3f21 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2022-11-09drivers/i2c/designware: Add 100 MHz controller base clockWerner Zeh
There are SoCs (for instance Intel Elkhart Lake) that do use 100 MHz as the base clock for I2C controllers. To support them properly add a frequency setting for 100 MHz to the designware I2C controller driver. Change-Id: I9ea11c6a41fd3758b771a416251e108cbe722769 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2022-11-09drivers/i2c/sx9324: Add support for Linux's SX9324 driverVictor Ding
SX9324 driver is updated per Linux's documentation found at https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml Supporting logic for the deprecated SX932x driver is hence guarded by DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER This patch by itself does not introduce functional changes to any board. The legacy SX932x Linux driver never reached upstream Linux and is only available in ChromeOS kernel fork of 4.4 and 5.4. Linux later accepted a different implementation named SX9324 and has been available since 5.4. Ideally all variants should adopt the new driver; however, during the transition phase, coreboot must support both drivers. It is better to have a single firmware build that can work with both Linux kernel drivers by specifying both sets of properties. Legacy driver support should be deleted once all variants finish migration. BUG=b:242662878 TEST=Dump ACPI SSDT then verify _DSD entries related to the legacy SX932x driver are identical w/ and w/o this patch (Tested on Craask and Nivviks) Change-Id: I42cd6841c3a270c242ed2e739db245e858eadb3b Signed-off-by: Victor Ding <victording@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69192 Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-11-05drivers/i2c/generic: Print error when using _CRS and PowerResourceRaul E Rangel
Exposing the GPIOs via an ACPI PowerResource and the _CRS results in the OS driver and ACPI thinking they own the GPIO. This can cause timing problems because it's not clear which system should be controlling the GPIO. I'm making this an error because we should really clean these up. BUG=b:210694108 TEST=Boot guybrush and see error: > I2C: 02:5d: ERROR: Exposing GPIOs in Power Resource and _CRS > \_SB.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ifcc42ed81fff295fb168a0b343e96b3a650b1c84 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Van Patten <timvp@google.com>
2022-11-03drivers/i2c/generic: Tweak error text for missing HIDMatt DeVillier
- drop ERROR prefix since already provided by cbmem log - make error text more clear about cause of error BUG=none Change-Id: I1795aee240a5383b21108c697e930a2e4972a0b4 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69062 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-22drivers/i2c/ptn3460: Add early init optionJan Samek
Create Kconfig options and boot state machine callback in ramstage for an early initialization of the PTN3460 DP-to-LVDS bridge. This allows showing the bootsplash screen on mainboards utilizing this chip during the PCI device enumeration. BUG=none TEST=Select PTN3460_EARLY_INIT config switch in mainboard Kconfig and check the log for "Attempting PTN3460 early init" message. If the board (e.g. siemens/mc_apl7 in this case) is also configured for showing the bootsplash logo, it should be now visible. Change-Id: I5424d062b3fb63c78cfced3971376353be11c504 Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67681 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-16drivers/i2c/nau8825: Add ADCOUT IO drive strength controlEric Lai
Add a property to control the driving of ADCOUT. BUG=b:234789689 TEST= build passed. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ibbedd5838a795ee645a5458b960062c5530ff3b5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67659 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-09-14timer: Change timer util functions to 64-bitRob Barnes
Since mono_time is now 64-bit, the utility functions interfacing with mono_time should also be 64-bit so precision isn't lost. Fixed build errors related to printing the now int64_t result of stopwatch_duration_[m|u]secs in various places. BUG=b:237082996 BRANCH=All TEST=Boot dewatt Change-Id: I169588f5e14285557f2d03270f58f4c07c0154d5 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66170 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-09-07drivers/i2c: Add a new RTC RV-3028-C7 from Micro CrystalWerner Zeh
This patch adds a driver for a new RTC from Micro Crystal. Supported features are: * configure backup voltage switchover via devicetree * configure backup capacitor charging mode via devicetree * set date if a voltage drop on backup voltage was detected to either a user definable (devicetree) or coreboot build date Change-Id: I37176ea726e50e4e74d409488981d7618ecff8bb Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2022-08-17drivers/i2c: add MAX98396 driverEric Lai
Add MAX98396 support. BUG=b:232606045 TEST=build passed. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: I835b51ea1fcc9363992d43a625f80cb545802fc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66217 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-08-11drivers: Add SPDX identifiers to files missing themMartin Roth
This adds SPDX identifiers to the remaining source files in the drivers directory that don't already have them. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I97f96de857515214069c3b77f3c781f7f0555c6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/66499 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-03drivers/i2c/dw_i2c: Re-add check for empty i2c transfer listNico Huber
The check was recently removed to allow callers to pass `count == 0`. Dereferencing the `msg` array is invalid in that case, though. Linux, where we borrowed the i2c interface from, also treats this with -EINVAL. Change-Id: I1eec02dd3a3fcf2d477a62cc65292fca40e469d3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66341 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Tim Crawford <tcrawford@system76.com>
2022-07-17drivers: Get rid of unnecessary blank lines {before,after} braceElyes HAOUAS
Change-Id: Ic1b38e93d919c1286a8d130700a4a2bfd6b55258 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61557 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-08drivers/tpm/cr50: Add TPM IRQ timeout Kconfig optionYu-Ping Wu
The current 10ms timeout for SPI TPM IRQ is not enough for platforms using ti50 (such as corsola). Therefore, introduce a new Kconfig option 'GOOGLE_TPM_IRQ_TIMEOUT_MS'. For platforms using cr50, we need to support legacy pre-ready-IRQ cr50 factory images during the initial boot, so the timeout remains 100ms for I2C TPM and 10ms for SPI TPM. For all the other platforms using ti50, the default timeout is increased to 750ms, as suggested by the ti50 team (apronin@google.com). BUG=b:232327704 TEST=emerge-corsola coreboot BRANCH=none Change-Id: I8dbb919e4a421a99a994913613a33738a49f5956 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-05-31drivers/i2c/generic: Add support for i2c device detectionMatt DeVillier
Add 'detect' flag which can be attached to devices which may or may not be present at runtime, and for which coreboot should probe the i2c bus to confirm device presence prior to adding an entry for it in the SSDT. This is useful for boards which may utilize touchpads/touchscreens from multiple vendors, so that only the device(s) present are added to the SSDT. This relieves the burden from the OS to detect/probe if a device is actually present and allows the OS to trust the ACPI _STA value. Change-Id: I1a4169ed6416d544773a37d29cdcc154d3c28519 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-05-31drivers/i2c/dw_i2c: Adjust to handle 0-byte transfersMatt DeVillier
0-byte writes can be used as a way to probe/check presence of an i2c device, so adjust _dw_i2c_transfer() to immediately set the STOP bit and raise logger level for TX abort messages when the segment length is zero. Adjust dw_i2c_transfer() to allow zero-segment-length messages to be passed thru to _dw_i2c_transfer(). Tested as part of entire i2c-detect patch train. Change-Id: I518e849f4c476c264a1464886b1853af66c0b29d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63561 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-05-28drivers/i2c/cs35l53: Add device description and UIDVitaly Rodionov
BUG=b:207333035 BRANCH=none TEST=built and verified speaker Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com> Change-Id: I0dd39760dc5f44f46838c07d2e52946edc2a6d7e Reviewed-on: https://review.coreboot.org/c/coreboot/+/64638 Reviewed-by: Vitaly Rodionov <vitaly.rodionov@cirrus.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-24tpm: Allow separate handling of Google Ti50 TPMJes Klinke
A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. This change makes use of Kconfigs TPM_GOOGLE_CR50 and TPM_GOOGLE_TI50 to be able to take slightly different code paths, when e.g. evaluating whether TPM firmware is new enough to support certain features. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63158 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-24drivers: Remove unused <acpi/acpi.h>Elyes HAOUAS
Found using: diff <(git grep -l '#include <acpi/acpi.h>' -- src/) <(git grep -l 'SLP_EN\|SLP_TYP_SHIFT\|SLP_TYP\|SLP_TYP_S\|ACPI_TABLE_CREATOR\|OEM_ID\|ACPI_DSDT_REV_\|acpi_device_sleep_states\|ACPI_DEVICE_SLEEP\|RSDP_SIG\|ASLC\|ACPI_NAME_BUFFER_SIZE\|COREBOOT_ACPI_ID\|acpi_tables\|acpi_rsdp\|acpi_gen_regaddr\|ACPI_ADDRESS_SPACE\|ACPI_FFIXEDHW_\|ACPI_ACCESS_SIZE_\|ACPI_REG_MSR\|ACPI_REG_UNSUPPORTED\|ACPI_HID_\|acpi_table_header\|MAX_ACPI_TABLES\|acpi_rsdt\|acpi_xsdt\|acpi_hpet\|acpi_mcfg\|acpi_tcpa\|acpi_tpm2\|acpi_mcfg_mmconfig\|acpi_hmat\|acpi_hmat_mpda\|acpi_hmat_sllbi\|acpi_hmat_msci\|acpi_srat\|ACPI_SRAT_STRUCTURE_\|acpi_srat_lapic\|acpi_srat_mem\|acpi_srat_gia\|CPI_SRAT_GIA_DEV_HANDLE_\|acpi_slit\|acpi_madt\|acpi_lpit\|acpi_lpi_flags\|acpi_lpi_desc_type\|ACPI_LPI_DESC_TYPE_\|acpi_lpi_desc_hdr\|ACPI_LPIT_CTR_FREQ_TSC\|acpi_lpi_desc_ncst\|acpi_vfct_image_hdr\|acpi_vfct\|acpi_ivrs_info\|acpi_ivrs_ivhd\|acpi_ivrs\|acpi_crat_header\|ivhd11_iommu_attr\|acpi_ivrs_ivhd_11\|dev_scope_type\|SCOPE_PCI_\|SCOPE_IOAPIC\|SCOPE_MSI_HPET\|SCOPE_ACPI_NAMESPACE_DEVICE\|dev_scope\|dmar_type\|DMAR_\|DRHD_INCLUDE_PCI_ALL\|ATC_REQUIRED\|DMA_CTRL_PLATFORM_OPT_IN_FLAG\|dmar_entry\|dmar_rmrr_entry\|dmar_atsr_entry\|dmar_rhsa_entry\|dmar_andd_entry\|dmar_satc_entry\|acpi_dmar\|acpi_apic_types\|LOCAL_APIC,\|IO_APIC\|IRQ_SOURCE_OVERRIDE\|NMI_TYPE\|LOCAL_APIC_NMI\|LAPIC_ADDRESS_\|IO_SAPIC\|LOCAL_SAPIC\|PLATFORM_IRQ_SOURCES\|LOCAL_X2APIC\|GICC\|GICD\|GIC_MSI_FRAME\|GICR\|GIC_ITS\|acpi_madt_lapic\|acpi_madt_lapic_nmi\|ACPI_MADT_LAPIC_NMI_ALL_PROCESSORS\|acpi_madt_ioapic\|acpi_madt_irqoverride\|acpi_madt_lx2apic\|acpi_madt_lx2apic_nmi\|ACPI_DBG2_PORT_\|acpi_dbg2_header\|acpi_dbg2_device\|acpi_fadt\|ACPI_FADT_\|PM_UNSPECIFIED\|PM_DESKTOP\|PM_MOBILE\|PM_WORKSTATION\|PM_ENTERPRISE_SERVER\|PM_SOHO_SERVER\|PM_APPLIANCE_PC\|PM_PERFORMANCE_SERVER\|PM_TABLET\|acpi_facs\|ACPI_FACS_\|acpi_ecdt\|acpi_hest\|acpi_hest_esd\|acpi_hest_hen\|acpi_bert\|acpi_hest_generic_data\|acpi_hest_generic_data_v300\|HEST_GENERIC_ENTRY_V300\|ACPI_GENERROR_\|acpi_generic_error_status\|GENERIC_ERR_STS_\|acpi_cstate\|acpi_sw_pstate\|acpi_xpss_sw_pstate\|acpi_tstate\|acpi_lpi_state_flags\|ACPI_LPI_STATE_\|acpi_lpi_state\|acpi_upc_type\|UPC_TYPE_\|acpi_ipmi_interface_type\|IPMI_INTERFACE_\|ACPI_IPMI_\|acpi_spmi\|ACPI_EINJ_\|ACTION_COUNT\|BEGIN_INJECT_OP\|GET_TRIGGER_ACTION_TABLE\|SET_ERROR_TYPE\|GET_ERROR_TYPE\|END_INJECT_OP\|EXECUTE_INJECT_OP\|CHECK_BUSY_STATUS\|GET_CMD_STATUS\|SET_ERROR_TYPE_WITH_ADDRESS\|TRIGGER_ERROR\|READ_REGISTER\|READ_REGISTER_VALUE\|WRITE_REGISTER\|WRITE_REGISTER_VALUE\|NO_OP\|acpi_gen_regaddr1\|acpi_einj_action_table\|acpi_injection_header\|acpi_einj_trigger_table\|set_error_type\|EINJ_PARAM_NUM\|acpi_einj_smi\|EINJ_DEF_TRIGGER_PORT\|FLAG_PRESERVE\|FLAG_IGNORE\|EINJ_REG_MEMORY\|EINJ_REG_IO\|acpi_einj\|acpi_create_einj\|fw_cfg_acpi_tables\|preload_acpi_dsdt\|write_acpi_tables\|acpi_fill_madt\|acpi_fill_ivrs_ioapic\|acpi_create_ssdt_generator\|acpi_write_bert\|acpi_create_fadt\|acpi_fill_fadt\|arch_fill_fadt\|soc_fill_fadt\|mainboard_fill_fadt\|acpi_fill_gnvs\|acpi_fill_cnvs\|update_ssdt\|update_ssdtx\|acpi_fill_lpit\|acpi_checksum\|acpi_add_table\|acpi_create_madt_lapic\|acpi_create_madt_ioapic\|acpi_create_madt_irqoverride\|acpi_create_madt_lapic_nmi\|acpi_create_madt\|acpi_create_madt_lapics\|acpi_create_madt_lapic_nmis\|acpi_create_madt_lx2apic\|acpi_create_srat_lapic\|acpi_create_srat_mem\|acpi_create_srat_gia_pci\|acpi_create_mcfg_mmconfig\|acpi_create_srat_lapics\|acpi_create_srat\|acpi_create_slit\|acpi_create_hmat_mpda\|acpi_create_hmat\|acpi_create_vfct\|acpi_create_ipmi\|acpi_create_ivrs\|acpi_create_crat\|acpi_create_hpet\|acpi_write_hpet\|generate_cpu_entries\|acpi_create_mcfg\|acpi_create_facs\|acpi_create_dbg2\|acpi_write_dbg2_pci_uart\|acpi_create_dmar\|acpi_create_dmar_drhd\|acpi_create_dmar_rmrr\|acpi_create_dmar_atsr\|acpi_create_dmar_rhsa\|acpi_create_dmar_andd\|acpi_create_dmar_satc\|cpi_dmar_\|acpi_create_\|acpi_write_hest\|acpi_soc_get_bert_region\|acpi_resume\|mainboard_suspend_resume\|acpi_find_wakeup_vector\|ACPI_S\|acpi_sleep_from_pm1\|acpi_get_preferred_pm_profile\|acpi_get_sleep_type\|acpi_get_gpe\|permanent_smi_handler\|acpi_s3_resume_allowed\|acpi_is_wakeup_s3\|acpi_align_current\|get_acpi_table_revision' -- src/) |grep "<" Change-Id: Ic890dc7c0ed02891d3144210016cd96f01c344d5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60632 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-21tpm: Refactor TPM Kconfig dimensionsJes B. Klinke
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-13drivers/i2c/designware/dw_i2c: Remove unnecessary tabs in debug logReka Norman
Before: [DEBUG] dw_i2c: SoC 400/3000 ns Bus: 400/1000000 ns [DEBUG] dw_i2c: period 334 rise 13 fall 2 tlow 174 thigh 80 spk 7 [DEBUG] dw_i2c: hcnt = 104 lcnt = 202 sda hold = 7 After: [DEBUG] dw_i2c: SoC 400/3000 ns Bus: 400/1000000 ns [DEBUG] dw_i2c: period 334 rise 13 fall 2 tlow 174 thigh 80 spk 7 [DEBUG] dw_i2c: hcnt = 104 lcnt = 202 sda hold = 7 BUG=None TEST=Check that the formatting looks correct, as above. Change-Id: I6703a5d6512cee7848edae27afcfd82eb89bcacb Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-03-25drivers/i2c/tpm: Work around missing board_cfg in Ti50 FW under 0.15Eric Lai
Ti50 FW under 0.15 is not support board cfg command which causes I2C errors and entering recovery mode. And ODM stocks are 0.12 pre-flashed. Add workaround for the old Ti50 chip. BUG=b:224650720 TEST=no I2C errors in coreboot. [ERROR] cr50_i2c_read: Address write failed [INFO ] .I2C stop bit not received Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ieec7842ca66b4c690df04a400cebcf45138c745d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63011 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-03-18drivers/i2c/cs35l53: Add driver for generating device in SSDTStefan Binding
This patch is adding support for Cirrus Logic CS35l41/CS35l53 smart amplifier. This part is now used in number of new chromebook's HW designs by several vendors. This driver uses the ACPI Device Property interface to generate the required parameters into the _DSD table format expected by the kernel. For detailed information about these properties, please check Linux kernel documentation: /Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml Change-Id: I2cbb1cef89f8d56ee73fab06c68933a2ab8c3606 Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Signed-off-by: Vitaly Rodionov <vitaly.rodionov@cirrus.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61448 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-15i2c: Add configurable I2C transfer timeoutJes Klinke
This patch introduces CONFIG_I2C_TRANSFER_TIMEOUT_US, which controls how long to wait for an I2C devices to produce/accept all the data bytes in a single transfer. (The device can delay transfer by stretching the clock of the ack bit.) The default value of this new setting is 500ms. Existing code had timeouts anywhere from tens of milliseconds to a full second beween various drivers. Drivers can still have their own shorter timeouts for setup/communication with the I2C host controller (as opposed to transactions with I2C devices on the bus.) In general, the timeout is not meant to be reached except in situations where there is already serious problem with the boot, and serves to make sure that some useful diagnostic output is produced on the console. Change-Id: I6423122f32aad1dbcee0bfe240cdaa8cb512791f Signed-off-by: Jes B. Klinke <jbk@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62278 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-09{drivers/security}: Replace `cb_err_t` with `enum cb_err`Subrata Banik
This patch replaces remaining `cb_err_t` with `enum cb_err` after commit hash 69cc557c (commonlib/bsd: Remove cb_err_t) removes majority of `cb_err_t` instances. TEST=Able to build the brya. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3392f9c2cfb4a889a999c8ea25066c89979f0900 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62676 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-03-07drivers/tpm/cr50: Add I2C bus support to cr50 driverTim Wawrzynczak
This allows mainboards using an I2C bus to communicate with the cr50 to reuse the functionality related to firmware version and BOARD_CFG. BUG=b:202246591 TEST=boot on brya0, see cr50 FW version in logs Change-Id: Ide1a7299936193da3cd3d15fdfd1a80994d70da0 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-23cr50: Increase cr50 i2c probe timeoutRob Barnes
Turns out 200ms still isn't enough in the worst reset conditions. There's been some reports of failures at 200ms with some older cr50 versions. Let's not take any chances and bump this way up since if this fails, it prevents boot. BUG=b:213828947 BRANCH=None TEST=Reboot and suspend_stress on Nipperkin Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I5be0a80c064546fd277f66135abc9d0572df11cb Reviewed-on: https://review.coreboot.org/c/coreboot/+/61864 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-11drivers/i2c/tpm/cr50: Remove unused `chip` function argumentsTim Wawrzynczak
The `chip` argument passed around to many functions in this driver is actualy unused, so remove it where it is unused. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ib8d32fdf340c8ef49fefd11da433e3b6ee561f29 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61718 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2022-02-07treewide: Remove "ERROR: "/"WARN: " prefixes from log messagesJulius Werner
Now that the console system itself will clearly differentiate loglevels, it is no longer necessary to explicitly add "ERROR: " in front of every BIOS_ERR message to help it stand out more (and allow automated tooling to grep for it). Removing all these extra .rodata characters should save us a nice little amount of binary size. This patch was created by running find src/ -type f -exec perl -0777 -pi -e 's/printk\(\s*BIOS_ERR,\s*"ERROR: /printk\(BIOS_ERR, "/gi' '{}' ';' and doing some cursory review/cleanup on the result. Then doing the same thing for BIOS_WARN with 's/printk\(\s*BIOS_WARNING,\s*"WARN(ING)?: /printk\(BIOS_WARNING, "/gi' Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I3d0573acb23d2df53db6813cb1a5fc31b5357db8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Lance Zhao Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
2022-02-04drivers/i2c/designware/dw_i2c: improve CONTROL_SPEED_FS definitionFelix Held
The speed control bits of the Designware I2C controller are bits 1 and 2 in the control register, so the values should be written as number shifted by the number of the first bit. The resulting constant is identical. TEST=Timeless build for amd/chausie results in identical binary Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id0881dfcd7703ab6a70a9b1a355d5a93771aebc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-02drivers/i2c/designware/dw_i2c: use cb_err for dw_i2c_gen_speed_configFelix Held
Using enum cb_err as return type instead of int improves the readability of the code. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8d96e5f72a8b3552ab39c1d298bafcc224bf9e55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61512 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-01drivers/i2c/designware/dw_i2c: limit scope of dw_i2c_transferFelix Held
Outside of the designware I2C driver the generic platform_i2c_transfer function should be used instead, so don't make dw_i2c_transfer available outside of this file. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib8b6a08b6aa2cd63adc2ef69b828661fa0ed154a Reviewed-on: https://review.coreboot.org/c/coreboot/+/61514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-01drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_transferFelix Held
Using enum cb_err as return type instead of int improves the readability of the code. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic1812c4d8d2b4d9ad331a787bd302a4f0707c1fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/61513 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-01drivers/i2c/designware/dw_i2c: return enum cb_err from dw_i2c_initFelix Held
Using enum cb_err as return type instead of int improves the readability of the code. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I55e6d93ca141b687871ceaa763bbbbe966c4b4a3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61511 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
2022-02-01drivers/i2c/designware/dw_i2c: use enum cb_err for static functionsFelix Held
Using enum cb_err as return type instead of int improves the readability of the code. This commit only changes the return value of the static functions in this file keeping the external interface identical. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I80300e0b24591fc660c3134139b9257e002cdbbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/61510 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-01drivers/i2c/designware/dw_i2c.h: include types.h instead of stdint.hFelix Held
size_t is defined in stddef.h and not stdint.h, so include types.h to get both. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I3782d3a949b72d1530ebd8078c46bc695f76dc4f Reviewed-on: https://review.coreboot.org/c/coreboot/+/61509 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-01drivers/i2c/designware/dw_i2c: add missing types.h includeFelix Held
This will provide the definitions for size_t, uint32_t and uintptr_t. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Icda8d458565bf981545d720d612cbdace04bedd4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-01-19driver/i2c: Add sx9360 driverSeunghwan Kim
Add driver for setting up Semtech sx9360 SAR sensor. The driver is based on sx9310.c. The core of the driver is the same, but the bindings are slightly different. Registers are documented in the kernel tree: Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml [https://patchwork.kernel.org/project/linux-iio/patch/20211213024057.3824985-4-gwendal@chromium.org/] Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I0a912f184e6f3501f894cca24c0d71a2c3087516 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-01-17cr50: Increase cr50 i2c probe timeoutRob Barnes
Turns out 150ms isn't enough in the worst reset conditions. On guybrush the TPM is reset in S0i3 and the CR50 is allowed to hibernate. The CR50 is woken up and initialized early during S0i3 resume. Occasionally the CR50 isn't ready before the probe times out. BUG=b:213828947 BRANCH=None TEST=suspend_stress_test -c 1000 Change-Id: Ifda438080cf1ad2796c7061223a6a97b8e6e9987 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61104 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
2022-01-17drivers/i2c/tpm/Kconfig: Reduce visibility of some configsArthur Heymans
I2C bus and address of the TPM are typically fixed on hardware so there is no need to be able to configure this in menuconfig. Change-Id: I1b6afa68fe753fb76348e0461209d218b14df7cb Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-01-10src/drivers/i2c/gpiomux: Remove unused <stdlib.h>Elyes HAOUAS
Found using: diff <(git grep -l '#include <stdlib.h>' -- src/) <(git grep -l 'memalign(\|malloc(\|calloc(\|free(' -- src/) Change-Id: Id3bd3d8a2d3609a13ecbc4eab14ba745e6365cab Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-11-24drivers/i2c/tpm: Fix blank default statementKarthikeyan Ramasubramanian
CB:59479 introduced a blank default statement. This is treated as an error or warning on some older toolchains. Add a break statement on default case. BUG=None TEST=Build the Guybrush mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I3d034cfebc8b8ae7d7024d41b4b2207cdeb083e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
2021-11-22drivers/tpm: Add firmware-power-managed DSD propertyRob Barnes
Introduce firmware-power-managed DSD ACPI property for TPM devices. This property can be checked by the kernel TPM driver to override how the TPM power states are managed. This is a tri-state flag, true, false, or unset. So an enum used to keep the flag is unset by default. When firmware-power-managed is true, the kernel driver will not send a shutdown during s2idle/s0i3 suspend. BUG=b:200578885 BRANCH=None TEST=TPM shutdown is triggered on s0ix suspend on guybrush with patched kernel Change-Id: Ia48ead856fc0c6e637a2e07a5ecc58423f599c5b Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-10-05src/acpi to src/lib: Fix spelling errorsMartin Roth
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58080 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-20driver/i2c/max98390: Add vmon_slot_no/imon_slot_no propertyWisley Chen
Add two properties (maxim, vmon-slot-no/maxim, imon-slot-no) in maxim9839 driver. This is I/V source destination definition that from below properties . maxim,vmon-slot-no => PCM_IVADC_V_DEST maxim,imon-slot-no => PCM_IVADC_I_DEST BUG=b:197076844 TEST=build and check SSDT Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Change-Id: Idb24d19c7cfea559bf6d53f401d66cadb8b3acc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-09-14driver/i2c/max98390: add dsm_param_nameWisley Chen
Maxim driver look for "maxim,dsm_param_name" to load dsm parameter file. dsm param file name consist of {dsm_param_file_name} filled in devicetree, {MAINBOARD_VENDOR} and {MAINBOARD_PART_NUMBER}. => {dsm_param_file_name}_{MAINBOARD_VENDOR}_{MAINBOARD_PART_NUMBER}.bin BUG=b:197076844 TEST=build, and check ssdt Change-Id: I006572d6a6ea55298374c688dfd9d877835da82d Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57119 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-08-23include/bcd: move bcd code to commonlib/bsd/includeRicardo Quesada
Move bcd2bin() / bin2bcd() functions to commonlib/bsd/include/ Also, the license is changed from GPL to BSD. This is because it is needed from "utils" (see CL in the chain). For reference bin2bcd() & bcd2bin() are very simple functions. There are already BSD implementations, like these ones (just to name a few): https://chromium.googlesource.com/chromiumos/platform/mosys/+/refs/heads/main/include/lib/math.h#67 http://web.mit.edu/freebsd/head/sys/contrib/octeon-sdk/cvmx-cn3010-evb-hs5.c BUG=b:172210863 TEST=make (everything compiled Ok). Change-Id: If2eba82da35838799bcbcf38303de6bd53f7eb72 Signed-off-by: Ricardo Quesada <ricardoq@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56904 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-09drivers/i2c/da7219: Update _S0W to D3hotTim Wawrzynczak
The DA7219 does not support wake from D3cold, therefore update the return value of _S0W from D3cold to D3hot. BUG=b:187228954 TEST=compile Change-Id: If03f83bb00ec90a2a6646d2c99d8bcc7e5533ac2 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56832 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-06-04drivers/i2c/designware: Report I2C timings for additional bus speedsWerner Zeh
Since the OS provides its own driver for the I2C controller it can choose to use a bus speed other than the one used at coreboot runtime. In this case it would be good to provide a way how the needed bus timings are communicated to the OS, since these are very board-specific and there is no way that the OS can know them other than read the appropriate ACPI reported timings. This patch adds some code to report additional bus speed timings if there are some defined in the devicetree. Change-Id: If921e0613864660dc1bb8d7c1b30fb9db8ac655d Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2021-05-30drivers/i2c/rx6110sa: Add a Kconfig switch to disable ACPI supportWerner Zeh
In commit b64db833d6 a basic ACPI support was added to the driver. With this support an SSDT-entry is created for this RTC and it is now visible to the OS via ACPI. In Linux the PNP-devices, which are reported over ACPI, are scanned rather early and if the entry is found, the device is claimed even if there is no driver available yet. In this case, when the native RTC-driver without ACPI-support is loaded and tries to register this device, the RTC is already blocked by the PNP-drivers and cannot be used anymore. This leads to a non-usable RTC on kernels where the needed ACPI-extension is not yet merged into the RTC driver. This patch provides a way to disable the ACPI-support for the RTC if needed. Change-Id: Ic65794d409d13a78d17275c86ec14ee6f04cd2a6 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55003 Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-12drivers/i2c/cs42l42: Make HS_BIAS_SENSE_EN optionalVitaly Rodionov
HSBIAS_SENSE_EN configures HSBIAS output current sense through the external 2.21-k resistor. HSBIAS_SENSE is hardware feature to reduce the potential pop noise during the headset plug out slowly. But on some platforms ESD voltage will affect it causing test to fail, especially with CTIA headset type. For different hardware setups, a designer might want to tweak default behavior. Signed-off-by: Vitaly Rodionov <vitaly.rodionov@cirrus.corp-partner.google.com> Change-Id: I87c6f01af1bdb5b1cb8e399191519598d7fbe9ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/52981 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-05drivers/i2c/generic: Set S0W to D3hot for wake deviceTony Huang
If device is supported as a wake source, _S0W should be set to D3hot. This ensures that the device is put into D3hot by the OSPM. Power resource(PRIC) for the device is listed in both _PR0 and _PR3. Thus, it ensures that the OSPM does not turn off power resource when device is put into D0 and D3hot. Hence, it is capable of waking the system from D3hot state. However, if it is put into D3cold, then the power resource is turned off by the OSPM. The devices we are currently looking at for touchscreen/touchpad do not really support auxiliary power and so do not support wake from D3cold. BUG=b:186070097 TEST=build and check device wake state _S0W set to 3 in ssdt table. Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52847 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>