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2019-03-14drivers/i2c/lm96000: Add new hardware-monitoring ICNico Huber
LM96000 is the successor of the famous LM85. Change-Id: Ie7df3107bffb7f8e45e71c4c1fbe4eb0a9e3cd03 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/21194 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-03-14drivers/i2c/nct7802y: Add new hardware-monitoring ICNico Huber
Just another hardware-monitoring chip. Only limited fan control and PECI configuration is implemented. Change-Id: I35ea79e12941804e398c6304a08170a776f4ca76 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
MMIO operations are arch-agnostic so the include path should not be arch/. Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31691 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
Change-Id: I91158452680586ac676ea11c8589062880a31f91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31692 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-15drivers/i2c/max98373: Set default bus speed as I2C_SPEED_FASTFurquan Shaikh
This change sets default bus speed as I2C_SPEED_FAST instead of I2C_SPEED_STANDARD when board does not provide any speed. This makes it similar to all other i2c drivers in coreboot. BUG=b:124403846 BRANCH=nocturne,atlas Change-Id: I877d837eea2dfebf78ad7d97a32ee2071500625e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/31407 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2019-01-24cr50: Add probe command to poll Cr50 until DID VID is validKeith Short
Added new routine cr50_i2c_probe() which ensures that communication with the Cr50 over I2C is good prior to attempting other initialization of the Cr50 and TPM state. This avoids a race condition when the Cr50 is first booting that it may reset it's I2C slave interface during the first few I2C transactions initiated from coreboot. BUG=b:120009037 BRANCH=none TEST=Run the Cr50 factory update against Careena board. Confirm that I2C reads are retried until the DID VID is valid. Tested against debug Cr50 firmware that forced failure of cr50_i2c_probe() and verfied that coreboot shows recovery screen. Change-Id: I47c59a32378ad00336277e111e81ba8d2d63e69a Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://review.coreboot.org/c/30295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Daniel Kurtz <djkurtz@google.com>
2019-01-23src/drivers: Remove needless '&' on function pointersElyes HAOUAS
Change-Id: I7a99d0dcbc8ea1362a12a68fa519c49058d30a05 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-07drivers/i2c/designware: Add soc_clock entry for 216MHzDuncan Laurie
Add an entry to the soc_clock table for a 216MHz clock so that the I2C controller clock is calculated correctly when the I2C bus is used in coreboot. This was tested by measuring the I2C clock speed on H1 I2C bus on a sarien board in coreboot and ensuring it is ~400KHz. Change-Id: I6c3cacdad318a5ce41bc41e3ac81385c2d4f396c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/30068 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-11-16src: Remove unneeded include <console/console.h>Elyes HAOUAS
Change-Id: I40f8b4c7cbc55e16929b1f40d18bb5a9c19845da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-09drivers/*/tpm: Add postcar targetPhilipp Deppenwiese
Now postcar is a standalone stage, add it as target to all TPM bus drivers. This is a required for a measured boot. Change-Id: I758185daf3941a29883c2256b900360e112275e1 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/29546 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
Change-Id: Idf10a09745756887a517da4c26db7a90a1bf9543 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-10-08Move compiler.h to commonlibNico Huber
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-10-08src: Use tabs for indentationElyes HAOUAS
Change-Id: I6b40aaf5af5d114bbb0cd227dfd50b0ee19eebba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28934 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-16acpi: Call acpi_gen_writeSTA by status from device treeHung-Te Lin
The device tree now supports 'hidden' and the status can be found in `struct device.hidden`. A new acpi_device_status() will return the expected setting of STA from a `struct device`. BUG=b:72200466 BRANCH=eve TEST=Builds and boots properly on device eve Change-Id: I6dc62aff63cc3cb950739398a4dcac21836c9766 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/28567 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-14drivers/i2c/tpm/cr50.c: Check if TPM was readRichard Spiegel
Under some conditions, cr50_i2c_read() can return without actually reading the TPM, which will leave access uninitialized. Set an initial value for access, and if TPM fails to respond in time check if at least TPM was read. This way avoids printing an uninitialized value. BUG=b:112253891 TEST=Build and boot grunt. Change-Id: I5ec7a99396db32971dc8485b77158d735ab1d788 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/27995 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-08-10drivers/i2c: Add i2c TPM support for different stagesPhilipp Deppenwiese
Change-Id: Ib0839933f8b59f0c87cdda4e5374828bd6f1099f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/23759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2018-08-10src/drivers: Fix typoElyes HAOUAS
Change-Id: I9144937b72a98517cbd41c093cff7bad543b4140 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27916 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-30drivers/i2c/da7219: Allow disabling micbias-pulse featureDaniel Kurtz
These two da7219_aad properties are optional: - dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV). [<2800>, <2900>] - dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms) When the Mic Bias Higher Voltage feature is not required, firmware should just not provide the dlg,micbias-pulse-lvl and dlg,micbias-pulse-time properties. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> BUG=b:111700809 TEST=On grunt: No "Invalid micbias pulse level" in dmesg Change-Id: Ie99a8962e78c68b3f6927d0de34168f265d4efa9 Reviewed-on: https://review.coreboot.org/27613 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Akshu Agrawal <akshu.agrawal@amd.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-09src/{device,drivers}: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
Change-Id: Ic1c9b1edd8d3206a68854107ddcbc5c51cb487c3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27404 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-06google: Use proper ACPI ID for Semtech chips: STHGwendal Grignou
Change-Id: I85cd567a923cccd2504f351aae276b5f0d9db4de Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://review.coreboot.org/27347 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt Delco <delco@google.com> Reviewed-by: Seunghwan Kim <sh_.kim@samsung.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-06-24drivers/i2c/alps: Get rid of i2c/alps driverFurquan Shaikh
i2c/alps driver implementation is an exact copy of the i2c/hid driver with only the addition of ALPS0001_HID. This can be supported by the i2c/hid driver using the hid field in devicetree which is what glkrvp mainboard does. So, this change removes the i2c/alps driver which is anyways unused. Change-Id: I60761c384f3d800532b2b346272da7be28b77acd Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27208 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-24drivers/i2c/sx9310: Check for config not being NULL before using itFurquan Shaikh
This change fixes the issue reported by Coverity CID 1393576 to ensure that config is checked for NULL before it is actually used. Change-Id: I5f0cd2bf2437fc640f4cf8d8203a971daf1f8d17 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27207 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Enrico Granata <egranata@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-22drivers/i2c: Add a driver for Semtech SX9310Enrico Granata
This adds a new driver for the SX9310 proximity detector device. The purpose of this is to enable the device's calibration information to be stored in firmware, and then transferred over to the kernel via ACPI. This device has more than 10 individual configuration parameters, so they would not fit in the generic driver's properties table. Change-Id: Id8c434eec9fe2da731e142442503a12e88db2236 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://review.coreboot.org/27173 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-12drivers/i2c/generic: Ensure config is not NULL before accessing itFurquan Shaikh
This change checks to ensure that config is not NULL before it is accessed for the first time. Reported by: Coverity CID #1393312 Change-Id: Ic248c79783da9c2bfdf3b7f737e5963feff7558c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27009 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
2018-06-06src/driver/i2c/{generic,hid,tpm,max}: Update device name based on devicetree.cbNaresh G Solanki
Name i2c device structure based on that in devicetree.cb Now log looks like: I2C: 01:0a (WCOM Touchscreen) I2C: 03:13 (Realtek RT5663) I2C: 03:39 (SSM4567 Right Speaker Amp) I2C: 03:3a (SSM4567 Left Speaker Amp) BUG=None BRANCH=None TEST=Build & boot Soraka Change-Id: I5dbb66ab705cd8601b8b1dc94bc6ee9f181b7be2 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/26830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
* Remove 2nd software stack in pc80 drivers directory. * Create TSPI interface for common usage. * Refactor TSS / TIS code base. * Add vendor tss (Cr50) directory. * Change kconfig options for TPM to TPM1. * Add user / board configuration with: * MAINBOARD_HAS_*_TPM # * BUS driver * MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2 * Add kconfig TPM user selection (e.g. pluggable TPMs) * Fix existing headers and function calls. * Fix vboot for interface usage and antirollback mode. Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-28drivers/i2c/max98373: update DT property namesSathyanarayana Nujella
Upstream Kernel side codec driver expect DT properties to have 'maxim' prefix. Update accordingly while filling SSDT entries. BUG=b:79362472 TEST=dump DT properties in kerenl side and cross checked TEST=Audio playback works with this change Change-Id: Iaa4b14492dbb5a0087242f1485493f3192336f60 Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-on: https://review.coreboot.org/26532 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-22src: Remove non-ascii charactersMartin Roth
Change-Id: Iedb78e24a286a51830c85724af0179995ed553be Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-04drivers/i2c/da7219: Add mclk-name propertyAkshu Agrawal
Non-dts based systems can pass mclk to da7219 driver by this property. BUG=b:74570989 TEST=Enabled clock in kernel driver using the property Change-Id: I2e10769e5b3c6b3aa30f340fe0e88c29b87430cb Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Reviewed-on: https://review.coreboot.org/25919 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-02src/drivers: Add reset/enable/stop_off_ms variables to ACPI devicesShelley Chen
Some touchscreens need to adhere to certain timings during the power off sequence as well as during the power on sequence. Adding reset_off_delay_ms, enable_off_delay_ms, and stop_off_delay_ms to accommodate these devices. BUG=b:78311818 BRANCH=None TEST=./util/abuild/abuild -p none -t google/poppy -x -a Change-Id: Idb4a5dbe56eee4749d2f2b514e92c28fb2c6078f Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/25882 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-04-27drivers/i2c/lm63: Remove unneeded headersElyes HAOUAS
Change-Id: Id13eef7f0fca0b929372490859aa4734ea7a9f23 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-04-27drivers/i2c/adm1026: Remove unneeded headersElyes HAOUAS
Change-Id: Iaed9c0882847511642d8eaab25e10d1ecf24bf90 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25867 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-04-27drivers/i2c/adm1027: Remove unneeded headersElyes HAOUAS
Change-Id: I147b3a2c79cd5e6b0e5fa3d23221a6afda8ba8f7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25866 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-04-26drivers/i2c/ck505: Remove unneeded headersElyes HAOUAS
Change-Id: Ic525c92e73097752a7c690186dc2034785cac678 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25821 Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-24compiler.h: add __weak macroAaron Durbin
Instead of writing out '__attribute__((weak))' use a shorter form. Change-Id: If418a1d55052780077febd2d8f2089021f414b91 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-03-21drivers/i2c/designware: Fix indentationMaulik V Vaghela
Remove extra tab before printk statement. Change-Id: Id82239f74ac030f25000a08764637f6d1b52b87b Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/25295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Naresh Solanki <naresh.solanki@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-02-15drivers/i2c: Add chip driver for I/O expander PCA9538Werner Zeh
The chip PCA9538 is a 8 bit I/O expander connected to the systems I2C bus. Add a chip driver to support this chip. Beside the pure chip driver two interface functions are provided to read the state of the pins and write output values to the pins. As the slave address of this chip is hardware configurable the function pca9538_get_dev() is used to get the right slave address. This function needs to be implemented in mainboard code if one needs to use the interface functions to read and write I/O state. Change-Id: Ic856123b4f4c8b721928ee3a2a4bb37833ea4b20 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/23748 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-02-14drivers/i2c/designware: Remove spurious word ("familuar")Jonathan Neuschäfer
Fixes: b8dc63bdfe ("ic2/designware: Move Intel i2c logic to shared driver") Change-Id: Ic521a2d60b403b322ae583bb2c26da6019bf0ab0 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/23714 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-02-10drivers/i2c/da7219: Allow GPIO based interruptDaniel Kurtz
Allow specifying the DA7219 interrupt pin as either an Interrupt or GpioInt. BUG=b:72121803 TEST=(with whole patch series) Grunt Kernel discovers DA7219 on i2c0 Change-Id: I2d26731bf4c0ad590dad2c5d26c252371f415f9a Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/23657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-02-02drivers/i2c/designware: conform to controller restrictionsAaron Durbin
The designware i2c controller indicates that the slave address shouldn't be programmed while the controller is enabled. Therefore, switch the ordering of the slave target address and the enable. Additionally, ensure the controller is disabled prior to the start of the slave programming sequence. Lastly, chunk up the i2c_msg segments at differing slave address boundaries. That allows for simpler programming for the controller by only doing one slave address transaction chunk at a time. BUG=b:70232394,b:69250772 Change-Id: Iebc08e2db847cb182fad98e0ff3d799b9a64aca7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23513 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-02-01drivers/i2c/designware: Unset IC_ENABLE when setting target addressChris Ching
To set address on AMD, IC_ENABLE == 0. BUG=b:69416132 BRANCH=none TEST=Test communication with i2c TPM on grunt and coral Change-Id: I7faee8e11439deceab946cc82d30d274b529b90d Signed-off-by: Chris Ching <chingcodes@chromium.org> Reviewed-on: https://review.coreboot.org/23293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2018-01-30drivers/i2c/tpm: Add irq_gpio support to tpm.Justin TerAvest
Grunt (a amd-stoneyridge based platform) uses a GPIO to interface with the tpm. This change allows devicetree entries to use a irq_gpio entry to describe the interface with the TPM. BUG=b:72655090 Change-Id: I08289891408d7176f68eb9c67f7a417a2448c2de Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://review.coreboot.org/23500 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-25drivers/i2c/designware: reduce API complication for bus configAaron Durbin
Right now dw_i2c_get_soc_cfg() is expecting the SoC to implement that callback for obtaining the bus config. However, we're currently forcing another parameter of struct device so one can do the lookup. This works for Intel-based systems since the struct device was needed to program the BAR, etc. However, from an API standpoint, it just complicates matters by needing to obtain the struct device. The SoC already has knowlege of its own devices so it can get the config itself by bus number. Therefore, remove that contraint from the API. BUG=b:70232394 Change-Id: Id8558f5deedda0963a46a532a7bf984e168fb270 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23420 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-24drives/i2c/designware: incorporate device_operations supportAaron Durbin
In ramstage the device_operations are needed for the i2c designware host controller. Move the intel/common/block/i2c implementation into the generic driver so other platforms can take advantage of it. BUG=b:72121803 Change-Id: Id249933fadcc016bfba00e7a6d65f56dfc220724 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2018-01-24drivers/i2c/designware: namespace soc functionsAaron Durbin
Rename the following functions to ensure it's clear that the designware i2c host controller driver is the one that these functions are associated with: i2c_get_soc_cfg() -> dw_i2c_get_soc_cfg() i2c_get_soc_early_base() -> dw_i2c_get_soc_early_base() i2c_soc_devfn_to_bus() -> dw_i2c_soc_devfn_to_bus() i2c_soc_bus_to_devfn() -> dw_i2c_soc_bus_to_devfn() BUG=b:72121803 Change-Id: Idb7633b45a0bb7cb7433ef5f6b154e28474a7b6d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23371 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-24device/i2c_bus: allow i2c_bus and i2c_simple to coexistAaron Durbin
If one wants to implement both i2c_bus.h and i2c_simple.h APIs the compilation unit needs to be guarded or coordinated carefully with different compilation units. Instead, name the i2c_bus functions with _dev such that it indicates that they operate on struct device. One other change to allow i2c_bus.h to be built in non-ramstage environments is to ensure DEVTREE_CONST is used for the dev field in struct bus. BUG=b:72121803 Change-Id: I267e27e62c95013e8ff8b0728dbe9e7b523de453 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/23370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-23drivers/i2c/max98373: Add driver for generating device in SSDTN, Harshapriya
Add a device driver to generate the device and required properties into the SSDT for max98373. TEST=verified SSDT contained relevant params BUG=None Change-Id: Id45f74e52855f4b19276e1d3d673d5448207ef4b Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Signed-off-by: N, Harshapriya <harshapriya.n@intel.com> Reviewed-on: https://review.coreboot.org/22673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
* Rename tlcl* to tss* as tpm software stack layer. * Fix inconsistent naming. Change-Id: I206dd6a32dbd303a6d4d987e424407ebf5c518fa Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/22104 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
* Move code from src/lib and src/include into src/security/tpm * Split TPM TSS 1.2 and 2.0 * Fix header includes * Add a new directory structure with kconfig and makefile includes Change-Id: Id15a9aa6bd367560318dfcfd450bf5626ea0ec2b Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/22103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-22ic2/designware: Move Intel i2c logic to shared driverChris Ching
BUG=b:70232394 BRANCH=none TEST=emerge-reef coreboot emerge-glados Change-Id: Idb453a4d2411163e6b4a8422310bf272eac5d379 Signed-off-by: Chris Ching <chingcodes@chromium.org> Reviewed-on: https://review.coreboot.org/22822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-22drivers/i2c/tpm/cr50: Simplify and increase init delay to 30 secondsDuncan Laurie
The Cr50 i2c driver provides separate entry points for probing and initialization, but probing function does not really do much. It also claims and releases locality on every coreboot stage, but there is no need for this - locality should be definitely claimed after reset and then it could be retained through the boot process. On top of that the driver does not properly account for long time it could take the Cr50 chip to come around to reset processing if TPM reset request was posted during a lengthy TPM operation. This patch addresses the issues as follows: - tpm_vendor_probe() and tpm_vendor_cleanup() become noops, kept around to conform to the expected driver API. - tpm_vendor_init() invokes a function to process TPM reset only in the first stage using TPM (typically verstage), the function checks if locality is claimed and if so - waits for it to be released, which indicates that TPM reset processing is over. - before claiming locality check if it is already taken, and if so - just proceed. BRANCH=none BUG=b:65867313, b:68729265 TEST=Verified that reef no longer hangs during EC reboot and firmware_Cr50ClearTPMOwner (not yet merged) tests. Change-Id: Iba8445caf1342e3a5fefcb2664b0759a1a8e84e3 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/22554 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-11-09drivers/i2c/tpm/cr50: Increase init delay to 30 secondsDuncan Laurie
In case the TPM is doing a long crypto operation the initial probe could be very delayed. Rather than end up in recovery make the delay long enough to accommodate the (current) long crypto times. BUG=b:65867313, b:68729265 TEST=Verified that Soraka no longer hangs during EC reboot test. Change-Id: I3bccff70e001dfc065c24be8ad34ef239a144db1 Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22379 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-07src: Fix all Siemens copyrightsMario Scheithauer
Some Siemens copyright entries incorrectly contain a dot at the end of the line. This is fixed with this patch. Change-Id: I8d98f9a7caad65f7d14c3c2a0de67cb636340116 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/22355 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-09-26Use stopwatch_wait_until_expired where applicableJonathan Neuschäfer
Change-Id: I4d6c6810b91294a7e401a4a1a446218c04c98e55 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/21590 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2017-09-14device: acpi_name() should take a const struct deviceAaron Durbin
There's no reason to mutate the struct device when determining the ACPI name for a device. Adjust the function pointer signature and the respective implementations to use const struct device. Change-Id: If5e1f4de36a53646616581b01f47c4e86822c42e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-09-06driver/i2c/max98927: Add imon and vmon paramsHarsha Priya
This change list adds imon and vmon slot numbers as params for Maxim 98927 driver. These values are looked up in the kernel driver to confiure IV feedback for audio playback on speakers. BUG=b:36724448 TEST=After boot, the register dump for Max98927 codecs should have imon and vmon slots numbers set in 0x1e register. Change-Id: I21d72ba91af83782587f11018b2d1d1c8d4f676c Signed-off-by: Harsha Priya <harshapriya.n@intel.com> Reviewed-on: https://review.coreboot.org/21195 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-08-30acpigen: Add stop gpio control to power resourceFurquan Shaikh
There is at least one I2C device (being used by Soraka) that has 3 controls -- enable, reset and stop. If the stop gpio is not put into the right state when turning off the device in suspend mode, then it causes leakage. Thus, we need control in power resource to be able to stop the device when entering suspend state. BUG=b:64987428 TEST=Verified on soraka that touchscreen stop is correctly configured on suspend. Change-Id: Iae5ec7eb3972c5c7f80956d60d0d3c321bbefb0f Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/21249 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-08-30drivers/i2c/ck505: Add generic driver to configure clockgenArthur Heymans
Replaces the ics/954309 driver with a more generic version to accommodate clockgens with a different amount of registers. It also features a mask to only touch certain bits of the clockgen. TODO: set appropriate mask for X60/T60 since the datasheets for their clockgens can be found. Change-Id: Ie43c4de7891a39f2f443e78213ecd688134e68d7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20042 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-08-30drivers/i2c/generic: Support additional device propertiesDuncan Laurie
Add support for providing additional free form device properties via devicetree in order to make this driver suitable for kernel drivers that need additional board-specific device properties. This currently allows adding up to 10 additional properties to a device. BUG=b:63413023 TEST=manual testing to ensure that newly added properties are in SSDT Change-Id: I2b8ceb208f4aba01053746547def6d07c8f8f3a2 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/21270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-18drivers/i2c/rx6110sa: Drop I2C interface arbitrationNico Huber
Change-Id: Ib31e77eec639c231520198c0b978d6c3c1eadaed Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-18include/device: Split i2c.h into threeNico Huber
Split `i2c.h` into three pieces to ease reuse of the generic defi- nitions. No code is changed. * `i2c.h` - keeps the generic definitions * `i2c_simple.h` - holds the current, limited to one controller driver per board, devicetree independent I2C interface * `i2c_bus.h` - will become the devicetree compatible interface for native I2C (e.g. non-SMBus) controllers Change-Id: I382d45c70f9314588663e1284f264f877469c74d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20845 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-14i2c: Move to Linux like `struct i2c_msg`Nico Huber
Our current struct for I2C segments `i2c_seg` was close to being compa- tible to the Linux version `i2c_msg`, close to being compatible to SMBus and close to being readable (e.g. what was `chip` supposed to mean?) but turned out to be hard to fix. Instead of extending it in a backwards compatible way (and not touching current controller drivers), replace it with a Linux source compatible `struct i2c_msg` and patch all the drivers and users with Coccinelle. The new `struct i2c_msg` should ease porting drivers from Linux and help to write SMBus compatible controller drivers. Beside integer type changes, the field `read` is replaced with a generic field `flags` and `chip` is renamed to `slave`. Patched with Coccinelle using the clumsy spatch below and some manual changes: * Nested struct initializers and one field access skipped by Coccinelle. * Removed assumption in the code that I2C_M_RD is 1. * In `i2c.h`, changed all occurences of `chip` to `slave`. @@ @@ -struct i2c_seg +struct i2c_msg @@ identifier msg; expression e; @@ ( struct i2c_msg msg = { - .read = 0, + .flags = 0, }; | struct i2c_msg msg = { - .read = 1, + .flags = I2C_M_RD, }; | struct i2c_msg msg = { - .chip = e, + .slave = e, }; ) @@ struct i2c_msg msg; statement S1, S2; @@ ( -if (msg.read) +if (msg.flags & I2C_M_RD) S1 else S2 | -if (msg.read) +if (msg.flags & I2C_M_RD) S1 ) @@ struct i2c_msg *msg; statement S1, S2; @@ ( -if (msg->read) +if (msg->flags & I2C_M_RD) S1 else S2 | -if (msg->read) +if (msg->flags & I2C_M_RD) S1 ) @@ struct i2c_msg msg; expression e; @@ ( -msg.read = 0; +msg.flags = 0; | -msg.read = 1; +msg.flags = I2C_M_RD; | -msg.read = e; +msg.flags = e ? I2C_M_RD : 0; | -!!(msg.read) +(msg.flags & I2C_M_RD) | -(msg.read) +(msg.flags & I2C_M_RD) ) @@ struct i2c_msg *msg; expression e; @@ ( -msg->read = 0; +msg->flags = 0; | -msg->read = 1; +msg->flags = I2C_M_RD; | -msg->read = e; +msg->flags = e ? I2C_M_RD : 0; | -!!(msg->read) +(msg->flags & I2C_M_RD) | -(msg->read) +(msg->flags & I2C_M_RD) ) @@ struct i2c_msg msg; @@ -msg.chip +msg.slave @@ struct i2c_msg *msg; expression e; @@ -msg[e].chip +msg[e].slave @ slave disable ptr_to_array @ struct i2c_msg *msg; @@ -msg->chip +msg->slave Change-Id: Ifd7cabf0a18ffd7a1def25d1d7059b713d0b7ea9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20542 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-09drivers/i2c: Add driver for rt5663 codecDuncan Laurie
This commit adds a new driver for the RT5663 codec to use instead of the generic i2c driver. Since the kernel needs additional driver-specific device properties we need a BIOS driver that can provide those properties. The kernel driver devicetree properties for this codec are at: linux/Documentation/devicetree/bindings/sound/rt5663.txt This was tested by booting and verifying the generated SSDT contains the expected device properties in _DSD. Scope (\_SB.PCI0.I2C4) { Device (RT53) { Name (_HID, "10EC5663") Name (_UID, Zero) Name (_DDN, "Realtek RT5663 Codec") Method (_STA, 0, NotSerialized) { Return (0x0F) } Name (_CRS, ResourceTemplate () { I2cSerialBus (0x0013, ControllerInitiated, 0x00061A80, AddressingMode7Bit, "\\_SB.PCI0.I2C4", 0x00, ResourceConsumer) GpioInt (Edge, ActiveBoth, Exclusive, PullDefault, 0x0000, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer) { 0x0051 } }) Name (_DSD, Package (0x02) { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") Package (0x05) { Package (0x02) { "irq-gpios", Package (0x04) { \_SB.PCI0.I2C4.RT53, Zero, Zero, Zero } }, Package (0x02) { "realtek,dc_offset_l_manual", 0x00FFD160 }, Package (0x02) { "realtek,dc_offset_r_manual", 0x00FFD1C0 }, Package (0x02) { "realtek,dc_offset_l_manual_mic", 0x00FF8A10 }, Package (0x02) { "realtek,dc_offset_r_manual_mic", 0x00FF8AB0 } } }) } } Change-Id: I3425fcbe13c9a5987fc91086d283a86db55c0819 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/20904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-08-08rx6110sa: Make sure that VLF bit will be clearedWerner Zeh
Ensure that the VLF bit will be cleared after a power loss event even if the stopwatch has expired before the code to clear the bit is reached. Change-Id: Ib2cfdabf4cd4df834395d6a102c6ae70568e71db Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/20893 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2017-07-28src/drivers: Fix checkpatch warning: no spaces at the start of a lineMartin Roth
This excludes files which are mostly spaces, which I felt should be handled separately. Change-Id: I33043a3090e2fc6e9d2fd81e8a5e46fb6cb0aa35 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20731 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
Also unify __attribute__ ((..)) to __attribute__((..)) and handle ((__packed__)) like ((packed)) Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/15921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-30rx6110sa: Add a software reset sequence in case of power lossWerner Zeh
According to the datasheet the RTC needs a power rising slope of no more than 100µs/V to ensure a correct power-on reset. If the mainboard that hosts the RTC cannot guarantee this, a software reset sequence is needed in the case where the battery was drained completely. As the rising slope of the power supply depends on so many parameters and is highly mainboard specific, refactor the initialization code to perform a software reset every time a power loss event is recognized by the RTC. Change-Id: If64d672e51667523058041bd00e1e50ac047143d Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/20412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-09rx6110sa: Add more chip configuration options to chipWerner Zeh
The RTC RX6110SA has several configuration options which might be interesting to set. To make this setup independent of the driver itself but let it still be configurable on mainboard level, add more configuration options to the chip driver. Change-Id: I7f8b2aa7cd001a887f271be36f655e10e60e778b Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/20084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2017-05-31rx6110sa: Add possibility to use both I2C and SMBus for the RTCWerner Zeh
The driver for the RTC RX6110SA is designed to be used with I2C bus. This patch adds the possibility to use SMBus operations to access the RTC. For this purpose the Kconfig switch RX6110SA_USE_SMBUS is added. It is not enabled per default so that I2C will be used. One can set this switch on board level to use SMBus instead. Change-Id: I4827ae2c544e8002399d94a1159acacd8176c5e9 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/19978 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-05-11drivers/i2c: Add new driver for RTC type RX6110 SAMario Scheithauer
This driver enables the usage of the external RTC chip RX6110 SA (http://www5.epsondevice.com/en/products/i2c/rx6110sab.html) which is connected to the I2C bus. The I2C address of this device is fixed. One can change parameters in the device tree so that the used setup can be adapted to match the configuration of the device on the mainboard. Change-Id: I1290a10c2d5ad76a317c99c8b92a013309a605d6 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/19625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2017-04-24drivers/i2c/tpm: Remove vendor.irqDaniel Kurtz
The vendor.irq field was originally intended for use as the TPM 1.2 "command complete" interrupt. However, all actual coreboot tpm drivers and hardware use the vendor.status method of checking command completion instead, and this irq field is not used. Let's just remove this unused functionality to simplify the code. BRANCH=none BUG=b:36786804 TEST=Boot reef w/ serial enabled firmware, verify verstage sees "cr50 TPM" and does not complain about lack of tis_plat_irq_status(). TEST=Boot eve w/ serial enabled firmware, verify verstage sees "cr50 TPM" and does not complain about lack of tis_plat_irq_status(). Change-Id: I994c5bfbd18124af9cb81d9684117af766ab0124 Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/19396 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-04-24drivers/i2c/tpm/cr50: Use tis_plat_irq_status for Cr50 IRQ statusDaniel Kurtz
The Cr50 TPM uses an IRQ to provide a "status" signal used for hand-shaking the reception of commands. Real IRQs are not supported in firmware, however firmware can still poll interrupt status registers for the same effect. Commit 94cc485338a3 ("drivers/i2c/tpm/cr50: Support interrupts for status") added support for the Cr50 driver on X86 platforms to use a KConfig file to supply an IRQ which it would poll using acpi_get_gpe. If the IRQ is not supplied, the Cr50 driver inserts a 20 ms wait. Unfortunately this doesn't work so well when using the i2c connected Cr50 on ARM platforms. Luckily, a more generic implementation to allow a mainboard to supply a Cr50 IRQ status polling function was solved for SPI connected Cr50s by commit 19e3d335bddb ("drivers/spi/tpm: using tpm irq to sync tpm transaction"). Let's refactor the i2c c50 driver to use this same approach, and change eve and reef boards to make use of DRIVER_TPM_TIS_ACPI_INTERRUPT for specifying the TPM flow control interrupt. This essentially reverts these two commits: 48f708d199 drivers/i2c/tpm/cr50: Initialize IRQ status handler before probe 94cc485338 drivers/i2c/tpm/cr50: Support interrupts for status And ports this commit to i2c/tpm/cr50: 19e3d335bd drivers/spi/tpm: using tpm irq to sync tpm transaction As a side effect the tpm_vendor_specific IRQ field goes back to its original usage as the "TPM 1.2 command complete" interrupt, instead of being repurposed to hold the flow control IRQ. BRANCH=none BUG=b:36786804 TEST=Boot reef w/ serial enabled firmware, verify verstage sees "cr50 TPM" and does not complain about lack of tis_plat_irq_status(). TEST=Boot eve w/ serial enabled firmware, verify verstage sees "cr50 TPM" and does not complain about lack of tis_plat_irq_status(). Change-Id: I004329eae1d8aabda51c46b8504bf210484782b4 Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: https://review.coreboot.org/19363 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-04-24drivers/i2c/tpm: Hide ACPI on unsupported platformsPatrick Rudolph
Depend on I2C_TPM to prevent showing the menu entry on systems that do not have an I2C TPM installed. Change-Id: I7cd647c9c7e9721eab96ab64b844a882f156ee68 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19374 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-04-13drivers/spi/tpm: Clean up SPI TPM driverFurquan Shaikh
1. Move common TIS macros to include/tpm.h. 2. Use common TIS macros while referring to status and access registers. 3. Add a new function claim_locality to properly check for required access bits and claim locality 0. BUG=b:36873582 Change-Id: I11bf3e8b6e1f50b7868c9fe4394a858488367287 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19213 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2017-04-03drivers/i2c/tpm: remove 1260 byte buffer from stackAaron Durbin
The tis.c module is needlessly copying data to/from a 1260 byte buffer on the stack. Each device's transport implementation (cr50.c or tpm.c) maintains its own buffer, if needed, for framing purposes. Therefore, remove the duplicated buffer. BUG=b:36598499 Change-Id: I478fb57cb65509b5d74bdd871f1a231f8080bc2f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19061 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2017-04-03drivers/i2c/tpm: remove unused variable in tpm_transmit()Aaron Durbin
The 'ordinal' variable is not used. Remove it. BUG=b:36598499 Change-Id: I015a6633c0951980658b3c879e48bc84d604d62e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19060 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-04-03drivers/i2c/tpm: remove unused types from tpm.hAaron Durbin
There are unused structures/types in the tpm.h header file. Remove them. BUG=b:36598499 Change-Id: Iddc147640dcec70e80791846eb46298de1070672 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19059 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2017-03-28Remove libverstage as separate library and source file classJulius Werner
In builds without CONFIG_VBOOT_SEPARATE_VERSTAGE, verstage files are linked directly into the bootblock or the romstage. However, they're still compiled with a separate "libverstage" source file class, linked into an intermediate library and then linked into the final destination stage. There is no obvious benefit to doing it this way and it's unclear why it was chosen in the first place... there are, however, obvious disadvantages: it can result in code that is used by both libverstage and the host stage to occur twice in the output binary. It also means that libverstage files have their separate compiler flags that are not necessarily aligned with the host stage, which can lead to weird effects like <rules.h> macros not being set the way you would expect. In fact, VBOOT_STARTS_IN_ROMSTAGE configurations are currently broken on x86 because their libverstage code that gets compiled into the romstage sets ENV_VERSTAGE, but CAR migration code expects all ENV_VERSTAGE code to run pre-migration. This patch resolves these problems by removing the separate library. There is no more difference between the 'verstage' and 'libverstage' classes, and the source files added to them are just treated the same way a bootblock or romstage source files in configurations where the verstage is linked into either of these respective stages (allowing for the normal object code deduplication and causing those files to be compiled with the same flags as the host stage's files). Tested this whole series by booting a Kevin, an Elm (both with and without SEPARATE_VERSTAGE) and a Falco in normal and recovery mode. Change-Id: I6bb84a9bf1cd54f2e02ca1f665740a9c88d88df4 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18302 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-03-16i2c/generic: Add support for GPIO IRQDuncan Laurie
Add support for using GPIO IRQ instead of PIRQ with an I2C device. This allows a device to use an edge triggered interrupt that will trigger on both high and low transitions. The _DSD method for describing these GPIOs has a field for 'active low' which is supposed to be 1 if the pin is active low, otherwise is zero. The value in here doesn't mean too much for GpioInt() as those will end up using the value from GpioInt() when it actually requests the interrupt. BUG=b:35581264 BRANCH=none TEST=test on Eve board that codec IRQ can be delcared as GPIO IRQ Change-Id: I02c64c7fc28dc2d608ad40db889c7242892f16db Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/18835 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-03-16drivers/i2c/tpm: Add support for Atmel TPM (AT97SC3204)Lee Leahy
The I2C interface for the Atmel AT97SC3204 TPM varies greatly from the existing I2C TPM support. The Atmel part just passes the commands and responses from the TIS layer across the I2C interface. TEST=Build and run on Galileo Gen2 with Crypto Shield and vboot enabled Change-Id: Ib2ef0ffdfc12b2fc11fe4c55b6414924d4b676dd Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/18800 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-03-16drivers/i2c/tpm: Add TPM (TIS) debugging supportLee Leahy
Add debugging support for the TIS transactions for the I2C TPM chips. TEST=Build and run on reef Change-Id: Ibc7e26fca781316d625f4da080f34749f18e4f9b Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/18799 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-03-15drivers/i2c/tpm: Fix issues detected by checkpatchLee Leahy
Fix the following warnings detected by checkpatch.pl: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: braces {} are not necessary for single statement blocks WARNING: Unnecessary parentheses - maybe == should be = ? WARNING: line over 80 characters WARNING: missing space after return type TEST=Build and run on Galileo Gen2 Change-Id: I56f915f6c1975cce123fd38043bad2638717d88c Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/18832 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-20drivers/i2c: Use I2C HID driver for wacom devicesFurquan Shaikh
Wacom I2C driver does the same thing as I2C HID driver, other than defining macros for Wacom HID. Instead of maintaining two separate drivers providing the same functionality, update all wacom devices to use generic I2C HID driver. BUG=None BRANCH=None TEST=Verified that ACPI nodes for wacom devices are unchanged. Change-Id: Ibb3226d1f3934f5c3c5d98b939756775d11b792c Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18401 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2017-02-19acpi_device: Move power resource function to generic codeDuncan Laurie
Move the function that adds a power resource block from i2c/generic to the acpi device code at src/arch/x86/acpi_device.c so it can be used by more drivers. BUG=chrome-os-partner:61233 TEST=verify SSDT table generation is unchanged Change-Id: I0ffb61a4f46028cbe912e85c0124d9f5200b9c76 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/18391 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-02-17driver/i2c/max98927: add i2c driver for Maxim 98927 codecRizwan Qureshi
Maxim 98927 kernel driver requires entries in the ACPI SSDT table, add a SSDT generator as part of this driver. BUG=chrome-os-partner:62051 BRANCH=None TEST=After boot, dump and verify that the generated SSDT ACPI table has the required entries. Change-Id: Ic2d4d8449288bc00d085852220b2e1e7a208e9ef Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: M Naveen <naveen.m@intel.com> Signed-off-by: Dylan Reid <dgreid@chromium.org> Reviewed-on: https://review.coreboot.org/18211 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-01-29i2c/generic: Allow GPIOs to be put in _CRS and PowerResource in ACPIFurquan Shaikh
Linux kernel expects that power management with ACPI should always be handled using PowerResource. However, some kernel drivers (e.g. ELAN touchscreen) check to see if reset gpio is passed in by the BIOS to decide whether the device loses power in suspend. Thus, until the kernel has a better way for drivers to query if device lost power in suspend, we need to allow passing in of GPIOs via _CRS as well as exporting PowerResource to control power to the device. Update mainboards to export reset GPIO as well as PowerResource for ELAN touchscreen device. BUG=chrome-os-partner:62311,chrome-os-partner:60194 BRANCH=reef TEST=Verified that touchscreen works on power-on as well as after suspend-resume. Change-Id: I3409689cf56bfddd321402ad5dda3fc8762e6bc6 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18238 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2017-01-03i2c/tpm: Ignore 0xFF bytes for status and burstCountJulius Werner
We've found that the SLB9645 TPM sometimes seems to randomly start returning 0xFF bytes for all requests. The exact cause is yet unknown, but we should try to write our TIS code such that it avoids bad interactions with this kind of response (e.g. any wait_for_status() immediately succeeds because all "status bits" are set in the response). At least for status and burstCount readings we can say for sure that the value is nonsensical and we're already reading those in a loop until we get valid results anyway, so let's add code to explicitly discount 0xFF bytes. BRANCH=oak BUG=chrome-os-partner:55764 TEST=None Change-Id: I934d42c36d6847a22a185795cea49d282fa113d9 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/420470 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://review.coreboot.org/18006 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-16drivers/i2c/generic: Allow mainboards to export reset and enable GPIOsFurquan Shaikh
Add power management type config option that allows mainboards to either: 1. Define a power resource that uses the reset and enable gpios to power on and off the device using _ON and _OFF methods, or 2. Export reset and enable GPIOs in _CRS and _DSD so that the OS can directly toggle the GPIOs as required. GPIO type needs to be updated in drivers_i2c_generic_config to use acpi_gpio type so that it can be used for both the above cases. BUG=chrome-os-partner:60194 BRANCH=None TEST=Verified that elan touchscreen works fine on reef using exported GPIOs. Change-Id: I4d76f193f615cfc4520869dedc55505c109042f6 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17797 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-12-16drivers/i2c/hid: Add generic I2C HID driverDuncan Laurie
Add a generic I2C-HID driver for these types of devices that do not need extra functionality. This allows a new device to be added without having to write a new driver. The i2c-hid PNP0C50 is automatically added as the _CID for the device in the ACPI Device. BUG=chrome-os-partner:58666 TEST=used on eve to describe a new i2c-hid touch controller Change-Id: I94e9531a72f9bf1d6b3ade362b88883b21b83d0a Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/17856 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-12-15drivers/i2c: Pass in i2c_generic_config into i2c_generic_fill_ssdtFurquan Shaikh
Remove any assumptions required for the drivers using i2c_generic to have drivers_i2c_generic_config structure at the start of the driver config. Instead pass in a pointer to drivers_i2c_generic_config from the calling driver. Change-Id: I51dc4cad1c1f246b51891abf7115a7120e87b098 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17857 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-12-15pcf8523: Fix wrong initialization of several registersWerner Zeh
In the case where the RTC is initialized after the battery is completely drained the bits for power_mode and cof_selection are set up with wrongly applied masks. In the case where the RTC is re-initialized again with no power-loss after the last initialization the bits for cap_sel, power_mode and cof_selection are not shifted to the right position. Both errors lead to a wrong initialization of the RTC and in turn to a way larger current consumption (instead of 120 nA the RTC current rises to over 2 µA). This patch fixes both errors and the current consumption is in the right range again. TEST=booted mc_bdx1 and verified current consumption of RTC Change-Id: I8594f6ac121a175844393952db2169dbc5cbd2b2 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/17829 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-11-16drivers/i2c/alps: Add support for ALPS Touchpad driverBarnali Sarkar
Add support for I2C ALPS Touchpad Device Driver. BUG=none BRANCH=none TEST=Build and booted successfully on KBL RVP and Touchpad is working Change-Id: I78b77bd7c4694ccf61260724f593bd59545c70e6 Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/17390 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-11-10drivers/i2c/wacom: Make the driver more genericFurquan Shaikh
Wacom I2C driver can be used by devices other than touchscreen. e.g. digitizer. So there is no need to name the driver with touchscreen specific attributes. Only a separate descriptor name is required that needs to be set by mainboard correctly. BUG=chrome-os-partner:56246 BRANCH=None TEST=Compiles successfully. Change-Id: I0d32a4adae477373b3f4c5f3abbe188860701194 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17341 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-09google/pyro: Update WACOM touchscreen ACPI _HIDJanice Li
WACOM request to add a new identifier `WCOMNTN2`, and use that for the board Pyro with all LCD combinations. BRANCH=master BUG=chrome-os-partner:58093 TEST=emerge-pyro vboot_reference coreboot chromeos-bootimage Signed-off-by: Janice Li <janice.li@quantatw.com> Change-Id: I95cf357efba958d7e864d2736d324e0aad70e307 Reviewed-on: https://review.coreboot.org/17257 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-07drivers/i2c/tpm/cr50: Increase IRQ timeoutDuncan Laurie
Increase the IRQ timeout to prevent issues if there is a delay in the TPM responding to a command. Split the no-IRQ case out so it doesn't suffer unnecessarily. BUG=chrome-os-partner:59191 TEST=suspend/resume testing on eve board Change-Id: I1ea7859bc7a056a450b2b0ee32153ae43ee8699f Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/17204 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-10-26drivers/i2c/wacom_ts: Add support for WCOM touchscreen device driverFurquan Shaikh
BUG=chrome-os-partner:57846 Change-Id: Id6bd91b3fd6420994ad5811d362618b1a38a8afa Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17092 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-10-25drivers/i2c/generic: Re-factor SSDT generation codeFurquan Shaikh
1. Export i2c_generic_fill_ssdt to allow other device-specific i2c drivers to share and re-use the same code for generating AML code for SSDT. In order to achieve this, following changes are required: a. Add macro I2C_GENERIC_CONFIG that defines a structure with all generic i2c device-tree properties. This macro should be placed by the using driver at the start of its config structure. b. Accept a callback function to add any device specific information to SSDT. If generic driver is used directly by a device, callback would be NULL. Other devices using a separate i2c driver can provide a callback to add any properties to SSDT. 2. Allow device to provide _CID. BUG=chrome-os-partner:57846 Change-Id: I3a0054e22b81f9d6d407bef417eae5e9edc04ee4 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17089 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-10-25drivers/i2c/generic: Enable support for adding PowerResource for deviceFurquan Shaikh
Add support to allow a device to define PowerResource in its SSDT AML code. PowerResouce ACPI generation expects SoC to define the callbacks for generating AML code for GPIO manipulation. Device requiring PowerResource needs to define following parameters: 1. Reset GPIO - Optional, GPIO to put device into reset or take it out of reset. 2. Reset delay - Delay after reset GPIO is de-asserted (default 0). 3. Enable GPIO - Optional, GPIO to enabled device. 4. Enable delay - Delay after enable GPIO is asserted (default 0). BUG=chrome-os-partner:55988 Change-Id: Ieb2dd95fc1f555f5de66f3dda425172ac5b75dad Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17081 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins)