coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2019-12-12	drivers/aspeed: Add AST2500 support	Patrick Rudolph
	Tested on AST2500. Code for AST2400 still works. Copy code from GNU/Linux kernel to coreboot to add AST2500 support. Change-Id: I25bd34dd52a0acd3e04fc5818e011215ef907fad Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34793 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-10-22	AUTHORS: Move src/drivers/[a-i] copyrights into AUTHORS file	Martin Roth
	As discussed on the mailing list and voted upon, the coreboot project is going to move the majority of copyrights out of the headers and into an AUTHORS file. This will happen a bit at a time, as we'll be unifying license headers at the same time. Updated Authors file is in a separate commit. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I1acea8c975d14904b7e486dc57a1a67480a6ee6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/36178 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-04-06	src: Use include <delay.h> when appropriate	Elyes HAOUAS
	Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: David Guckian
2018-11-19	src: Add required space after "switch"	Elyes HAOUAS
	Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-26	During DRAM initialization on certain ASpeed devices, an incorrect	Timothy Pearson
	bit (bit 10) was checked in the "SDRAM Bus Width Status" register to determine DRAM width. Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05. Change-Id: I05c3c7877015d95eb8d512f7410604b9af043b26 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13807 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-24	drivers/aspeed: Add native text mode VGA support for the AST2050	Timothy Pearson
	Change-Id: I37763a59d2546cd0c0e57b31fdb7aa77c2c50bee Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11937 Reviewed-by: Peter Stuge <peter@stuge.se> Tested-by: build bot (Jenkins)