| Age | Commit message (Collapse) | Author |
|---|
|
Change-Id: Iba3135178f2d6021702971e4d887e9b4f8afeb76
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
|
|
Add additonal LPDDR4 speed grades. This is needed because the limited
set has casued confusion when the reported speed did not match
expectations. There does not seem to be a definitive list of LPDDR4
speed grades, so this list is derieved from JEDEC 209-4C and a survey
of commonly used LPDDR4 speed grades.
BUG=b:194184950
TEST=Boot, dmidecode -t 17 reports correct speed
BRANCH=None
Change-Id: Ie7706fd4ad5a7df68c07b8ca43261429ba140c61
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
|
|
BUG=b:184124605
TEST=check serial log
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Change-Id: I521a2541e23d047e255b0cc8068ad63dfaf70bfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
|
|
Add lpddr4.c utility file with lpddr4_speed_mhz_to_reported_mts.
Fill in lpddr4_speeds using JDEC 209-4C table 210.
LPDDR4 SPD decoding utilities are not included since there isn't
a present need.
BUG=b:184124605
TEST=Build and run on guybrush
Change-Id: Id8ddfc98fff4255670c50e1ddd4d0a1326265772
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52745
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
|
