coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-08-14	dram: Add basic DDR4 SPD parsing	Andrey Petrov
2019-05-29	src/{device,drivers}: Add missing 'include <types.h>'	Elyes HAOUAS
2018-09-11	src/device/dram: Fix typo	Elyes HAOUAS
2018-04-09	device/dram/ddr2.c: Add methods to compute to identify dram	Arthur Heymans
2018-03-14	src/device/dram/ddr2: Fix supported burst lengths	Elyes HAOUAS
2018-02-22	device/ddr2,ddr3: Rename and move a few things	Arthur Heymans
2017-12-20	device/dram/ddr2.c: Store the checksum in the decoded SPD struct	Arthur Heymans
2017-09-26	device/dram/ddr2.c: fix a hidden syntax error introduced earlier	Bill XIE
2017-09-22	device/dram/ddr2.c: Decoding byte[12] bit7 as self refresh flag	Arthur Heymans
2017-09-22	device/dram/ddr2: Add break to several case statements that lack it	Patrick Georgi
2017-09-20	device/dram/ddr2.c: Improve error returning and debug output	Arthur Heymans
2017-09-16	device/dram/ddr2: Fix decoding tRR	Arthur Heymans
2017-09-06	device/dram/ddr2: Add a function to normalize tCLK	Arthur Heymans
2017-06-09	device/dram/ddr2.c: Fix is_registered_ddr2	Arthur Heymans
2017-03-10	device/dram/ddr2: Add common ddr2 spd decoder	Patrick Rudolph