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path: root/src/device/device_const.c
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2020-05-12util/sconfig: Add LPC and ESPI busesRaul E Rangel
Picasso has an LPC and eSPI bridge on the same PCI DEVFN. They can both be active at the same time. This adds a way to specify which devices belong on which bus. i.e., device pci 14.3 on # - D14F3 bridge device espi 0 on chip ec/google/chromeec device pnp 0c09.0 on end end end device lpc 0 on end end BUG=b:154445472 TEST=Built trembyle and saw static.c contained the espi bus. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-22device: Add helper function to find matching device on busFurquan Shaikh
This change adds a helper function dev_find_matching_device_on_bus() which scans all the child devices on the given bus and calls a match function provided by the caller. It returns the first device that the match function returns true for, else NULL if no such device is found. Change-Id: I2e3332c0a175ab995c523f078f29a9f498f17931 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40543 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-22device: Add a helper to find device behind a PCI-to-PCI bridge deviceFurquan Shaikh
This change adds a helper function to find PCI device with dev# and function# behind a PCI-to-PCI bridge device. BUG=b:153858769 BRANCH=None TEST=None Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Ie5672b35cda66431a0f1977f217bdf61d3012ace Reviewed-on: https://review.coreboot.org/c/coreboot/+/40474 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-22device: Add checks for NULL in device_const.c functionsFurquan Shaikh
This change checks to ensure that device/path passed into any of the functions in device_const.c is not NULL. Since NULL is not expected to be passed into these functions, this change adds a die() call in case the assumption is broken. Change-Id: I1ad8d2bcb9d0546104c5e065af1eeff331cdf96d Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-04src/device: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: Id5fe26564147ec532850430ea55b19ee94d5c5a5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40050 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-11-21device/pci: Reduce scope of dev_find_slot()Kyösti Mälkki
We only keep it around because soc/intel debugging still depends on it. Change-Id: I3ea37c097bbcc3cf5c0574c7d727eae4f5bee307 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-11-20nb/amd/fam10: Drop supportArthur Heymans
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: If36ef0749dbb661f731fb04829bd7e2202ebb422 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-09-27device: add commentary to dev_find_slot()Aaron Durbin
dev_find_slot() can sometimes fail to return the desired device object prior to full PCI enumeration. Comment the declaration and implementation accordingly to help the user understand the problem and avoid its usage. Change-Id: I3fe1f24ff015d3e4f272323947f057e4c910186c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35632 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-17AUTHORS: Move src/device copyrights into AUTHORS fileMartin Roth
As discussed on the mailing list and voted upon, the coreboot project is going to move the majority of copyrights out of the headers and into an AUTHORS file. This will happen a bit at a time, as we'll be unifying license headers at the same time. Additional cleanup - Unify "Inc" to "Inc." and "LLC." to "LLC" Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ie03a3ce1f6085494bd5f38da76e2467970cf301a Reviewed-on: https://review.coreboot.org/c/coreboot/+/35430 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-08-26Split MAYBE_STATIC to _BSS and _NONZERO variantsKyösti Mälkki
These are required to cover the absensce of .data and .bss sections in some programs, most notably ARCH_X86 in execute-in-place with cache-as-ram. Change-Id: I80485ebac94b88c5864a949b17ad1dccdfda6a40 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35003 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-07-18devicetree: Add accessors for chip_infoKyösti Mälkki
Apply uniform style of error messages for missing device nodes and chip_info. Change-Id: I70def4599509b8193e44ea3f02c4906f865b4469 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-07-17soc/intel: Fix regression with hidden PCI devicesKyösti Mälkki
Fix regression with commit 903b40a soc/intel: Replace uses of dev_find_slot() Platforms where FSP hides PCI devices before enumeration may halt with error message 'PCI: dev is NULL!'. The workaround here is to print an error message revealing the faulty source code function and revert to old behaviour of dev_find_slot(). Change-Id: I5eab3e7f1993b686103eaa257aacda379dc259fa Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34285 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-12device/pci: Declare pcidev_path_on_bus()Kyösti Mälkki
It is recommended to never reference PCI busses using a static number. There is exception with OPROM execution, where we want to translate the bus number captured from the actual IO operation into a matching device node in the devicetree. Change-Id: I733c645ac5581c000b4cd6cdc05829cd039324d5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34077 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-07device/pci: Declare pci_root_bus()Kyösti Mälkki
This is used a lot, cache the result so search of domain from devicetree is only done once. Improvement only applies when MAYBE_STATIC evaluates to static. Change-Id: If675abb632fe68acd59ba0bdfef854da3e0839a9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-08amdfam10 boards: Fix regression on dev_find_slot() removalKyösti Mälkki
For these platforms, the first PCI node on devicetree is not the root of PCI bus hierarchy, and the topology (bus->children and dev->sibling links) are getting manipulated during HyperTransport enumeration. This workaround reverts back to old dev_find_slot() with its bad semantics. Change-Id: I19745c3070c12e562ffab2f0243c9d91dd051c72 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30695 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-01-04device: Introduce pcidev_on_root() and friendsKyösti Mälkki
Semantics of dev_find_slot() are ill in the sense that it only works after device enumeration has completed in ramstage. Plan is to declare it as deprecated. Introduce pcidev_on_root() and pcidev_path_on_root() functions to replace cases where this was called with static argument bus == 0. New implementation only walks the root bus of the PCI tree, while old one walked the entire linked list of devices. Introduce pcidev_path_behind() to replace cases where argument bus != 0. The required parent node is typically one of the PCIe root functions that you locate using pcidev_on_root() above. New forms are safe to use with early devicetree and before PCI bus numbers have been assigned. Change-Id: Ie20598d48b4cf6e35e45fc90804bad4728437fc6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/26447 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-07-26device: add child traversal helper functionAaron Durbin
Add a function, dev_bus_each_child(), which walks through all the children for a given bus of a device. This helper allows one to walk through all the children of a given device's bus. BUG=b:111808427,b:111743717 TEST=built Change-Id: Iedceb0d19c05b7abd5a48f8dc30f85461bef5ec6 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/27636 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-05-25device: Move find_dev_path() to device_const.cKyösti Mälkki
Change-Id: I8a27aa7157b5706623272ba9354ed8dff9b8184f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-25device: Move dev_find_path() to device_const.cNico Huber
Make it available early and use it in dev_find_next_pci_device(). Change-Id: I1d0ad07f37ea79dae2b9a592fcccba5e03fd86d5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/26294 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-25device: Rename device_simple.c --> device_const.cNico Huber
In early stages (pre ramstage), we have two notions of devices. To access the hardware, "simple device" handles are used. These are plain numbers. To access the static information of the device tree, we use `struct device` pointers. This is referred to as DEVTREE_EARLY in the code. This file is about the latter and its name reflects that the tree remains unmodified. Change-Id: I31aeb118615e86026f7111f83a7866d4e7426170 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/26293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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