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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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cpu of a certain type and to eliminate the
cpu p5
cpu p6
cpu k7
nonsense in the old config files.
Next step is to hook into Eric's pci device stuff.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Changes to allow more code to be compiled both ways
- Working SMP support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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with older ones...
- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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fewer registers, and is easier to hardcode.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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