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path: root/src/cpu
AgeCommit message (Expand)Author
2021-01-24cpu/intel/model_2065x: Drop unused c-state codeAngel Pons
2021-01-24soc/intel/broadwell: Move romstage.c to HaswellAngel Pons
2021-01-24soc/intel/broadwell: Use Haswell CPU headersAngel Pons
2021-01-24cpu/intel/haswell: Add Broadwell CPUIDs and microcodeAngel Pons
2021-01-24cpu/intel/haswell: Set C9/C10 vccminAngel Pons
2021-01-24cpu/intel/haswell: Add fast ramp voltage for BroadwellAngel Pons
2021-01-22cpu/intel/haswell: Enable timed MWAIT if supportedAngel Pons
2021-01-21cpu/intel/haswell: Clean up CPUID definitionsAngel Pons
2021-01-21cpu/intel/haswell: Add s0ix supportAngel Pons
2021-01-21cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZEElyes HAOUAS
2021-01-19cpu/x86/sipi_vector.S: Fix reading MCU revisionArthur Heymans
2021-01-18cpu/x86/smm/smm_module_loaderv2.c: Remove repeated wordElyes HAOUAS
2021-01-18cpu/x86/mtrr/earlymtrr.c: Remove repeated wordElyes HAOUAS
2021-01-18cpu/intel/smm/gen1/smmrelocate.c: Remove repeated wordElyes HAOUAS
2021-01-15build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi
2021-01-15cpu/intel/haswell/acpi.c: Use C-state enum definitionsAngel Pons
2021-01-15cpu/intel/haswell: Factor out ACPI C-state valuesAngel Pons
2021-01-15cpu/intel/*init: Remove obsolete cache enablePatrick Rudolph
2021-01-15cpu/mp_init: Fix microcode lockPatrick Rudolph
2021-01-15cpu/x86/mpinit: Serialize microcode updates for HT threadsPatrick Rudolph
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-13cpu/x86/smm: Pass GNVS with smm_module_loader v2Kyösti Mälkki
2021-01-12cpu/x86/sipi_vector: Simplify loop getting unique CPU numberPatrick Rudolph
2021-01-11cpu/intel/haswell: Add delay for TPM before Flex Ratio rebootAngel Pons
2021-01-11cpu/intel/haswell: Allow tuning VR for C-state operationsAngel Pons
2021-01-11cpu/intel/haswell: Raise PSI1 threshold to 20AAngel Pons
2021-01-11cpu/intel/haswell: Enable turbo ratio if availableAngel Pons
2021-01-11cpu/intel/haswell: Do not set PMG_IO_CAPTURE_BASE MSRAngel Pons
2021-01-11mb/emulation/qemu: Copy page tables to DRAM in assemblyPatrick Rudolph
2021-01-10cpu/intel/haswell/haswell.h: Align with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Align cosmetics with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Do not determine CPU type at runtimeAngel Pons
2021-01-08cpu/x86/smm: Use append instead of assign for smm-c-depsFurquan Shaikh
2021-01-08cpu/intel/model_206ax: Always return a package from _CSTAngel Pons
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
2021-01-07ACPI: Remove ACPI_NO_SMI_GNVSKyösti Mälkki
2021-01-07arch/x86: Move prologue to .init sectionKyösti Mälkki
2021-01-07cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`Angel Pons
2021-01-06cpu/intel/model_206ax: Simplify C-state acpigenAngel Pons
2021-01-06cpu/intel/model_206ax: Rename `cX_acpower` optionsAngel Pons
2021-01-06cpu/intel/model_206ax: Unify ACPI C-state optionsAngel Pons
2021-01-06cpu/intel/x/chip.h: Drop unused `disable_acpi` settingAngel Pons
2021-01-04ACPI: Final APM_CNT_GNVS_UPDATE cleanupKyösti Mälkki
2021-01-04arch/x86: Pass GNVS as parameter to SMM moduleKyösti Mälkki
2020-12-25cpu/intel/model_206ax: Add more CPU steppingsAngel Pons
2020-12-25nb/intel/sandybridge: Move steppings to CPU headerAngel Pons
2020-12-16arch/x86: Link gdt_init.S into bootblockKyösti Mälkki
2020-12-16arch/x86: Clean up bootblock assemblyKyösti Mälkki
2020-12-14arch/x86: Combine bootblock linker scriptsKyösti Mälkki
2020-12-12nb/intel/sandybridge: Clean up stepping logicAngel Pons
2020-12-11Drop many cases of .previous directive useKyösti Mälkki
2020-12-10cpu/x86/64bit/exit32.inc: Don't invalidate cache in CARPatrick Rudolph
2020-12-05cpu/x86/64bit: Add code to call function in protected modePatrick Rudolph
2020-12-04cpu/x86/smm_module_loaderv2: Fix compiling for x86_64Arthur Heymans
2020-12-04mb/emulation/x86: Add optional parallel_mp init supportArthur Heymans
2020-12-04cpu/qemu-x86: Increase MAX_CPUS to have actual AP initArthur Heymans
2020-12-04cpu/x86/lapic/secondary.S: Adapt for x86_64Arthur Heymans
2020-12-04cpu/qemu-x86: Add the option to have no SMMArthur Heymans
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-12-02cpu/x86/smm/smm_stub: Fix stack canary on x86_64Patrick Rudolph
2020-12-02cpu/x86/smm/smm_stub: Fix GDT for x86_64Patrick Rudolph
2020-12-01cpu/x86/early_reset: Mark assemblycode as 32bitPatrick Rudolph
2020-12-01cpu/intel/microcode: Mark assemblycode as 32bitPatrick Rudolph
2020-12-01cpu/x86/sipi: Add x86_64 supportPatrick Rudolph
2020-11-27Makefile.inc: Move adding mcu FIT entriesArthur Heymans
2020-11-22cpu/intel/common: Fill cpu voltage in SMBIOS tablesPatrick Rudolph
2020-11-22cpu/amd/microcode: Remove dead MakefileArthur Heymans
2020-11-22cpu/amd/pi: Remove unused cpu code 00660F01Martin Roth
2020-11-21intel/socket_441: Increase bootblock sizeJulius Werner
2020-11-19ACPI S3: Replace acpi_is_wakeup()Kyösti Mälkki
2020-11-17Revert "arch|cpu/x86: Add Kconfig option for x86 reset vector"Kyösti Mälkki
2020-11-16cpu/x86/smm/smm_module_loaderv2: Properly print stack_endArthur Heymans
2020-11-16cpu/x86/smm/smm_module_loaderv2.c: Use more variablesArthur Heymans
2020-11-16cpu/x86/smm: Check that the stub size is < save state sizeArthur Heymans
2020-11-10cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registersArthur Heymans
2020-11-10sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans
2020-11-09cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4Michał Żygowski
2020-11-09cpu/x86/smm: Add a common save state handlingArthur Heymans
2020-11-09cpu/x86/smm/smm.ld: Assert that CONFIG_MAX_CPUS <= 4Arthur Heymans
2020-11-09cpu/x86/smm/smihandler.c: Simplify smm revision handlingArthur Heymans
2020-11-03cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons
2020-11-03cpu/x86/mp_init: Add support for x86_64Patrick Rudolph
2020-11-02cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph
2020-11-02cpu/x86/smm: Pass smm.ld through src-to-objArthur Heymans
2020-10-31cpu/x86/lapic: rename virtual wire mode initialization functionFelix Held
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-31cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner
2020-10-30cpu/x86/sipi_vector.S: Use correct suffix for btsJacob Garber
2020-10-30cpu/x86: increase timeout for CPUs to check in after 2nd SIPIJonathan Zhang
2020-10-30cpu/intel/Makefile.inc: Use correct Kconfig symbolsAngel Pons
2020-10-27cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDENJonathan Zhang
2020-10-26cpu/intel/common: implement the two missing CPPC v2 autonomous registersMichael Niewöhner
2020-10-24cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-23haswell/broadwell: Fix typos of `BCLK`Angel Pons
2020-10-21cpu/intel/common: Fix regressionPatrick Rudolph
2020-10-21{cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner
2020-10-20cpu/x86/mtrr: add support for address space higher than 16TiBJonathan Zhang
2020-10-20cpu/intel/model_{2065x,206ax}: fix AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: add a Kconfig to control AES-NI lockingMichael Niewöhner
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