Age | Commit message (Expand) | Author |
2015-12-06 | Remove #ifdef checks on Kconfig symbols | Martin Roth |
2015-12-06 | fsp_model_406dx: use external microcode .h files for rangeley | Martin Roth |
2015-12-02 | x86/smm: Initialize SMM on some CPUs one-by-one | Damien Zammit |
2015-12-01 | cpu/amd/fam10h-15h: Enable DFE on Family 15h HT3 links | Timothy Pearson |
2015-12-01 | cpu/amd/fam10h-15h: Fix link type detection and XCS buffer count setup | Timothy Pearson |
2015-12-01 | cpu/amd/fam10h-15h: Force iolink detect to either 1 or 0 | Timothy Pearson |
2015-11-30 | cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes | Timothy Pearson |
2015-11-26 | amd/car: don't apply Fam10h/Fam12h Errata 343 fix to Fam0Fh | Jonathan A. Kollasch |
2015-11-24 | FSP 1.0: Fix CAR issues - broken timestamps and console | Ben Gardner |
2015-11-24 | northbridge/amd/amdht: Add isochronous setup support | Timothy Pearson |
2015-11-24 | amd/amdfam10: Control Fam15h cache partitioning via nvram | Timothy Pearson |
2015-11-24 | Unify OBJCOPY arguments throughout various x86 stages | Stefan Reinauer |
2015-11-24 | cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx | Damien Zammit |
2015-11-23 | cpu/amd/fam15h: Set up Link Base Channel Buffer Count registers | Timothy Pearson |
2015-11-23 | cpu/amd: de-duplicate MSR include files | Stefan Reinauer |
2015-11-22 | cpu/amd/fam10h15h: Set up SRI to XCS Token Count registers on Family 15h | Timothy Pearson |
2015-11-22 | cpu/amd/family_10h-family_15h: Set up cache controls on Family 15h to improve... | Timothy Pearson |
2015-11-22 | cpu/amd/family_10h-family_15h: Set up link XCS token counts on Family 15h | Timothy Pearson |
2015-11-22 | cpu/amd/family_10h-family_15h: Configure NB register 2 | Timothy Pearson |
2015-11-21 | cpu/amd/car/post_cache_as_ram: Avoid trailing spaces | Paul Menzel |
2015-11-21 | amd/family_10h-family_15h: Fix poor performance on Family 15h CPUs | Timothy Pearson |
2015-11-20 | northbridge/amd/amdht: Add support for HT3 2.8GHz and up link frequencies | Timothy Pearson |
2015-11-20 | cpu/amd/family_10h-family_15h: Fix incorrect revision detection | Timothy Pearson |
2015-11-20 | nb/amd/amdfam10: Add HyperTransport probe filter support | Timothy Pearson |
2015-11-20 | fsp1_0: Remove hardcoded microcode locations | Martin Roth |
2015-11-20 | cpu/amd/fam10h-fam15h: Set northbridge throttle values | Timothy Pearson |
2015-11-19 | cpu/amd/fam10h-fam15h: Bring HT register configuration in line with BKDG | Timothy Pearson |
2015-11-19 | x86: Add Kconfig to disable early bootblock postcodes | Martin Roth |
2015-11-18 | cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence | Timothy Pearson |
2015-11-16 | intel/fsp_model_406dx: Load APs microcode in model_406dx_init | David Guckian |
2015-11-16 | intel/fsp_rangeley: Load BSP microcode in bootblock | David Guckian |
2015-11-16 | cpu/amd/fam10h-15h: Fix BSP stack corruption on 32-core Fam10 systems | Timothy Pearson |
2015-11-15 | amd/model_fxx: Check FID&VID Support for the BSP (too) | Urja Rannikko |
2015-11-15 | cpu/amd: Fix AMD Family 15h ECC initialization reliability issues | Timothy Pearson |
2015-11-14 | cpu/x86/lapic: Add stack overrun detection | Timothy Pearson |
2015-11-11 | cpu/amd: Add CC6 support | Timothy Pearson |
2015-11-10 | cpu/amd/car: Add romstage BSP stack overrun detection | Timothy Pearson |
2015-11-10 | cpu: Add a way to use microcode .h files back to the build | Martin Roth |
2015-11-10 | amd/model_fxx: fix code style in FID&VID support check | Urja Rannikko |
2015-11-10 | cpu/intel: Add socket BGA1284 | Marc Jones |
2015-11-08 | cpu/amd/family_10h-family_15h: Increase BSP stack size | Timothy Pearson |
2015-11-08 | cpu/amd/family_10h-family_15h: Add Family 15h microcode file | Timothy Pearson |
2015-11-06 | amd/00730F01: Add correct CPU model | Kyösti Mälkki |
2015-11-06 | AMD binaryPI: Fix include paths | Kyösti Mälkki |
2015-11-05 | cpu/microcode: Remove EXTERNAL / ADDED_DURING_BUILD variables | Timothy Pearson |
2015-11-03 | cpu/amd/model_fxx: Backport PowerNow! core count fix from Family 10h | Timothy Pearson |
2015-11-02 | cpu/amd: Add initial AMD Family 15h support | Timothy Pearson |
2015-11-02 | cpu/amd/family_10h-family_15h: Use correct label for break state | Timothy Pearson |
2015-11-02 | cpu/amd: Move model_10xxx to family_10h-family_15h | Timothy Pearson |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-31 | sandybridge: Disable parallel CPU initialization | Nico Huber |
2015-10-30 | cpu: port amd/pi to 64bit | Stefan Reinauer |
2015-10-30 | smm: 64bit fixes | Stefan Reinauer |
2015-10-30 | AMD mainboards: Fix 64bit BiosCallOuts.c | Stefan Reinauer |
2015-10-30 | cpu/amd/model_fxx: Clear out unused / stale MTRRs in ramstage | Timothy Pearson |
2015-10-30 | cpu/amd/model_fxx: Enable FIDVID code on Socket F K8 | Timothy Pearson |
2015-10-30 | cpu/amd/model_fxx: Backport APIC code and debug aids from Family 10h | Timothy Pearson |
2015-10-30 | cpu/amd/car: Honor BKDG recommendations for DisFillP in CAR | Timothy Pearson |
2015-10-30 | cpu/amd/model_fxx: Fix invalid P-state power values | Timothy Pearson |
2015-10-30 | cpu/amd/model_fxx: Add Socket F CPU ID mappings | Timothy Pearson |
2015-10-29 | smmhandler: on i945..nehalem, crash if LAPIC overlaps with ASEG | Patrick Georgi |
2015-10-28 | cpu/intel/fsp_model_206ax: Load microcode in coreboot | Martin Roth |
2015-10-27 | cpu/amd/car: Add initial Suspend to RAM (S3) support | Timothy Pearson |
2015-10-27 | cpu: create an empty file when no microcode files are given | Alexander Couzens |
2015-10-25 | cpu/amd/car: Use standard integer types in post_cache_as_ram.c | Timothy Pearson |
2015-10-25 | cpu/amd/car: remove PRINTK_IN_CAR #define that was hardcoded to 1 | Timothy Pearson |
2015-10-24 | cpu/amd: Add initial support for AMD Socket G34 processors | Timothy Pearson |
2015-10-23 | cpu/intel: Move Power notification ASL code into `common/acpi` | Paul Menzel |
2015-10-23 | cpu/amd/model_10xxx: Clean up debugging statements | Timothy Pearson |
2015-10-22 | model_fxx/powernow: add dual core Socket F TDPs | Jonathan A. Kollasch |
2015-10-22 | Revert "Remove sandybridge and ivybridge FSP code path" | Martin Roth |
2015-10-16 | cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS | Timothy Pearson |
2015-10-15 | cpu/x86/mtrr: Add MTRR index and total MTRRs to error message | Paul Menzel |
2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
2015-10-14 | Revert "Remove FSP Rangeley SOC and mohonpeak board support" | Martin Roth |
2015-10-14 | cpu/amd/microcode: Update parser to use stock microcode blobs | Audrey Pearson |
2015-10-14 | x86: add standalone verstage support | Aaron Durbin |
2015-10-08 | arch/x86/bootblock: Do not include non-code files in bootblock.S | Alexandru Gagniuc |
2015-10-07 | x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection | Alexandru Gagniuc |
2015-10-05 | cpu/Makefile.inc: Only inculde x86 subdir if ARCH_x86 is selected | Alexandru Gagniuc |
2015-10-03 | Remove FSP Rangeley SOC and mohonpeak board support | Alexandru Gagniuc |
2015-10-03 | Remove sandybridge and ivybridge FSP code path | Alexandru Gagniuc |
2015-10-03 | sandybridge ivybridge: Treat native init as first class citizen | Alexandru Gagniuc |
2015-09-30 | cpu: microcode: Use microcode stored in binary format | Alexandru Gagniuc |
2015-09-24 | coreboot: move TS_END_ROMSTAGE to one spot | Aaron Durbin |
2015-09-14 | qemu: initialize lapic | Gerd Hoffmann |
2015-09-09 | linking: add and use LDFLAGS_common | Aaron Durbin |
2015-09-09 | rmodule: use program.ld for linking | Aaron Durbin |
2015-09-09 | x86: link romstage like the other architectures | Aaron Durbin |
2015-09-09 | intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMER | Martin Roth |
2015-09-09 | x86: bootblock: remove linking and program flow from build system | Aaron Durbin |
2015-09-08 | cpu: fix cpu_microcode class | Aaron Durbin |
2015-09-07 | microcode: Unify rules to add microcode to CBFS once again | Alexandru Gagniuc |
2015-09-05 | amd/geode_lx: make done_cache_as_ram_main global | Aaron Durbin |
2015-09-04 | x86: remove cpu_incs as romstage Make variable | Aaron Durbin |
2015-08-25 | Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig | Martin Roth |
2015-08-14 | cpu/amd/model_10xxx: Do not initialize SMM memory if SMM is disabled | Timothy Pearson |
2015-08-13 | amd: raminit sysinfo offset fix | Aaron Durbin |
2015-08-07 | via/nano: Move CPU microcode to 3rdparty/blobs | Stefan Reinauer |
2015-08-07 | amd/model_fxx: Move CPU microcode to 3rdparty/blobs | Stefan Reinauer |