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AgeCommit message (Expand)Author
2010-10-12We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.Uwe Hermann
2010-10-12Reduce duplicate definition in CAR code.Warren Turkal
2010-10-11Factor out a few commonly duplicated functions from northbridge.c.Uwe Hermann
2010-10-07Remove some duplicate #include files (trivial).Uwe Hermann
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
2010-10-06Convert all Intel 440BX boards to Cache-as-RAM (CAR).Uwe Hermann
2010-10-04Add missing Intel Pentium II/III era CPU IDs.Uwe Hermann
2010-10-02Add comments to make it clear why these two lines are written like that:Uwe Hermann
2010-10-01Factor out common CAR asm snippets.Uwe Hermann
2010-10-01Cosmetics, whitespace and coding-style fixes for Intel CAR (trivial).Uwe Hermann
2010-10-01Fix some breakage from 5890.Myles Watson
2010-10-01fix VIA C7 code.Stefan Reinauer
2010-10-01Add missing parenthesis (trivial).Uwe Hermann
2010-10-01CAR simplifications, typos, readability improvements (trivial).Uwe Hermann
2010-09-30Various cosmetic and coding style fixes in CAR code (trivial).Uwe Hermann
2010-09-30Use existing, readable MTRR #defines instead of hardcoding numbers.Uwe Hermann
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-30fix Kontron KT690 and clean up socket S1G1 boards accordingly.Stefan Reinauer
2010-09-30Move CAR settings to board config for socket 940 boards.Warren Turkal
2010-09-30Move VIA C7 board CAR config to VIA C7 instead of boards.Warren Turkal
2010-09-29Forgot to 'svn add' src/cpu/x86/name (trivial).Uwe Hermann
2010-09-29Factor out fill_processor_name() and strcpy() functions.Uwe Hermann
2010-09-27All these boards already had the CACHE_AS_RAM option in their individualWarren Turkal
2010-09-27Move CAR config from mainboard to CPU config for AMD GX2 boards.Warren Turkal
2010-09-27This patch moves one of the CAR configs to the socket from the singleWarren Turkal
2010-09-27drop some dead code from model_fxx_init.cStefan Reinauer
2010-09-27Add a few missing license headers based on svn logs, and also add aUwe Hermann
2010-09-27drop double include (trivial)Stefan Reinauer
2010-09-26drop some more unneeded ../../..Stefan Reinauer
2010-09-26Normalize the config option for the Intel Atom CPU.Warren Turkal
2010-09-26dumpmmcr utility is available under util and shares most of the code.Stefan Reinauer
2010-09-25Drop <cpu/amd/mtrr.h> #include from Intel CPUs.Uwe Hermann
2010-09-25- Fix race condition in option_table.h generation by moving the includeStefan Reinauer
2010-09-23Whitespace/typo/cosmetic fixes (trivial).Uwe Hermann
2010-09-17Clear bit 35 of msr c001_102a in Fam10 rev C cores.Arne Georg Gleditsch
2010-09-16Add more Fam10 CPUID strings from the AMD revision guide. IncludesMarc Jones
2010-09-14This patch corrects a coding error in the original implementationScott Duplichan
2010-09-13CONFIG_MMCONF_SUPPORT is always defined. Fix build.Myles Watson
2010-09-13Move initialization of MMCONF BAR to cache_as_ram setup phase, in orderArne Georg Gleditsch
2010-09-10Move memory type information out of some AMD sockets.Myles Watson
2010-09-09Adapt comment, too. (trivial)Patrick Georgi
2010-09-09Please find appended. This patch gets rid of the %gs magic altogether,Arne Georg Gleditsch
2010-09-09Apparently, it's not crucial to clear this at the exact moment we switchArne Georg Gleditsch
2010-09-08Trivial - remove stray characters from a comment block.Marc Jones
2010-09-08Make timer2 the default choice for TSC initialization.Patrick Georgi
2010-09-08It should not be necessary to read in the rom during CAR setup.Kevin O'Connor
2010-09-072ms is enough time to accurately obtain the clock rate.Kevin O'Connor
2010-09-07Set up an arbitrary amount of system memory on Geode LX, soAurelien Guillaume
2010-08-30We call this cache as ram everywhere, so let's call it the same in KconfigStefan Reinauer
2010-08-30mPGA479M Sockets can take Intel Mobile Celeron.Andreas Schultz
2010-08-22I've checked Revision Guide for AMD Family10h processors (#41322) revXavi Drudis Ferran
2010-08-22RB_C3 should also apply the workaround for errata 354, according toXavi Drudis Ferran
2010-08-22RB_C3 and HY-D0 should also apply the workaround for errata 344, according toXavi Drudis Ferran
2010-08-22Complete code for errata 343. Revision Guide for AMD Family10hXavi Drudis Ferran
2010-08-22Include RB_C3 in erratum 346Xavi Drudis Ferran
2010-08-22Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc.Xavi Drudis Ferran
2010-08-14My forgotten CAR cleanup patch...Stefan Reinauer
2010-08-14clean up comment in entry32.incStefan Reinauer
2010-08-03Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /Stefan Reinauer
2010-08-01make early_mtrr_init() invisible for cache as ram targets as it breaks them.Stefan Reinauer
2010-08-01- fix SMM code relocation raceStefan Reinauer
2010-07-27Add src/cpu/amd/model_gx2/cache_as_ram.inc missing from r5669Nils Jacobs
2010-07-26This patch converts the Geode GX2 boards to CAR.Nils Jacobs
2010-07-08Fix all warnings in the tree Stefan Reinauer
2010-07-08get rid of even more fam10 and k8 warnings.Stefan Reinauer
2010-07-07fix some more warningsStefan Reinauer
2010-07-06Re-integrate "USE_OPTION_TABLE" code.Edwin Beasant
2010-06-21This patch adds support for the Intel D810E2CB (i810e/ICH2) desktop board. Hu...Joseph Smith
2010-06-21Create new socket for FCPGA370 and PGA370 CPU's for CAR. Add CAR support for ...Joseph Smith
2010-06-10This commit updates the Geode LX GLCP delay control setup from the v2 way to ...Edwin Beasant
2010-06-09Same conversion as with resources from static arrays to lists, exceptMyles Watson
2010-06-07replace outb -> port 0x80 with post_code() in some places.Stefan Reinauer
2010-06-04This patch replaces the headers of the following files:Frank Vibrans
2010-05-30don't generate C source code file but use objcopy to include the SMM blob.Stefan Reinauer
2010-05-28Add Intel Atom microcodeStefan Reinauer
2010-05-26Update Intel microcode include files from their web page.Stefan Reinauer
2010-05-26Use the microcode files as created by the new microcode update script. (Fixes...Stefan Reinauer
2010-05-26Drop problematically licensed Intel microcode filesStefan Reinauer
2010-05-26cosmetical changes on intel's microcode.cStefan Reinauer
2010-05-25also rename the config option.Stefan Reinauer
2010-05-25Long ago we agreed on kicking the _direct appendix because everything inStefan Reinauer
2010-05-21Get rid of this warning:Myles Watson
2010-05-16Following patch reworks car_disable into C. Tested, works here. I comparedRudolf Marek
2010-05-14Remove another set of includes from Fam10 romstages:Patrick Georgi
2010-05-14license header fixes Nils Jacobs
2010-05-09Move includes to where they are needed. This allows to simplifyPatrick Georgi
2010-04-27Enable the cache before initializing the processor name, like model_10 does.Myles Watson
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
2010-04-26I meant SSE. Reported by Dustin Harrison.Myles Watson
2010-04-26Enable SSE2 for ep80579. Reported by Dustin Harrison.Myles Watson
2010-04-25a single place for the romstage stack for copy_and_run.Stefan Reinauer
2010-04-25drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h"Stefan Reinauer
2010-04-24these cpus are explicitly supported by model_6bxStefan Reinauer
2010-04-23AMD Socket ASB2 and AM3 support.Zheng Bao
2010-04-22fix ARRAY_SIZE issue.Stefan Reinauer
2010-04-21oops, sorry for the last commit. This commit changes the code to distinguishStefan Reinauer
2010-04-21* clean up all but two warnings on artecgroup dbe61Stefan Reinauer
2010-04-20Make VSA code selectable in KconfigStefan Reinauer
2010-04-15Remove a few more warnings from fam10.Myles Watson
2010-04-14drop quite a lot of dead code that did nothing but produce warnings and makeStefan Reinauer
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