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path: root/src/cpu
AgeCommit message (Expand)Author
2016-11-02cpu/amd: Update files for 00670F00Marc Jones
2016-11-02cpu/amd: Copy 00660F01 to 00670F00Marc Jones
2016-10-31lib/prog_loaders: use common ramstage_cache_invalid()Aaron Durbin
2016-10-11src/cpu: Fix location for cpu_microcode_blob.bin in COREBOOT CBFS onlyBarnali Sarkar
2016-10-11cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZENico Huber
2016-10-09cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4EArthur Heymans
2016-10-07src/cpu: Remove unnecessary whitespaceElyes HAOUAS
2016-10-07cpu/amd/geode_gx2: Remove unnecessary semicolonElyes HAOUAS
2016-10-04src/cpu: Remove whitespace after sizeofElyes HAOUAS
2016-10-01cpu/amd/model_fxx: transition away from device_tAntonello Dettori
2016-09-13cpu/amd/family_10h-family_15h: transition away from device_tAntonello Dettori
2016-09-12cpu/x86: Move fls() and fms() to mtrr.hRizwan Qureshi
2016-09-08Kconfig: Add option for microcode filenamesMartin Roth
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-28src/cpu: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-28src/cpu: Remove unnecessary whitespace before "\n"Elyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-08-18Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUSAaron Durbin
2016-08-18Kconfig: lay groundwork for not assuming SPI flash boot deviceAaron Durbin
2016-08-14cpu/ti/am355x: Fix array overrunPaul Menzel
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-26intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-23intel/haswell: Remove useless MTRR clearKyösti Mälkki
2016-07-23intel/haswell post-car: Minor fix on MTRR settingKyösti Mälkki
2016-07-23intel/haswell: Add asmlinkage for romstage_after_car()Kyösti Mälkki
2016-07-22cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundaryAaron Durbin
2016-07-22intel car: Unify postcodesKyösti Mälkki
2016-07-22intel car: Unify whitespace and comment fixesKyösti Mälkki
2016-07-22intel car: Remove guard on XIP_ROM_SIZEKyösti Mälkki
2016-07-22intel model_106cx: Include CAR from socket directoryKyösti Mälkki
2016-07-21AMD k8 fam10: Fix CAR GLOBALS late in romstageKyösti Mälkki
2016-07-15AMD binaryPI: Use common romstage ram stackKyösti Mälkki
2016-07-15AMD binaryPI: Split romstage ram stackKyösti Mälkki
2016-07-15AMD binaryPI: Use common ACPI S3 recoveryKyösti Mälkki
2016-07-15AGESA: Use common romstage ram stackKyösti Mälkki
2016-07-15AGESA: Use common ACPI S3 recoveryKyösti Mälkki
2016-07-10intel post-car: Consolidate choose_top_of_stack()Kyösti Mälkki
2016-07-10AMD k8 fam10: Drop excessive spinlock initializationKyösti Mälkki
2016-07-10AMD k8 fam10: Fix romstage handoffKyösti Mälkki
2016-06-29AMD k8 fam10: Refactor S3 recoveryKyösti Mälkki
2016-06-29intel/haswell: No need for ACPI S3 resume backupKyösti Mälkki
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-06-24region: Add writeat and eraseat supportAntonello Dettori
2016-06-22ACPI S3: Add common recovery codeKyösti Mälkki
2016-06-22ACPI S3: Move SMP trampoline recoveryKyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-22intel/model_206ax: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-22intel/model_2065x: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-22intel cache-as-ram: Fix comment about MTRRsKyösti Mälkki
2016-06-21intel/model_6ex: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-21intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-21intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-20amd/fam_10h-fam_15h: allow building without microcode updatesArthur Heymans
2016-06-20amd/geode: Fix comment about ACPI S3Kyösti Mälkki
2016-06-20VIA C7 NANO: Fix early MTRR settingKyösti Mälkki
2016-06-18intel: Fix romstage main() with asmlinkageKyösti Mälkki
2016-06-18intel/cache_as_ram_ht.inc: Fix includeKyösti Mälkki
2016-06-18intel cache_as_ram: Fix typo in commentKyösti Mälkki
2016-06-17intel/model_206ax: Move platform specific definesKyösti Mälkki
2016-06-17Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki
2016-06-17Fix some cbmem.h includesKyösti Mälkki
2016-05-18AGESA vendorcode: Build a common amdlibKyösti Mälkki
2016-05-17intel/sch: Merge northbridge and southbridge in src/socStefan Reinauer
2016-05-12AGESA f12: Build as libagesa.aKyösti Mälkki
2016-05-12AGESA f16kb: Build as libagesa.aKyösti Mälkki
2016-05-09drivers/uart: Use uart_platform_refclk for all UART modelsLee Leahy
2016-05-06cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZEAaron Durbin
2016-05-06{cpu,soc}/intel: remove unused smm_init() functionAaron Durbin
2016-05-06cpu/x86/mp_init: reduce exposure of internal implementationAaron Durbin
2016-05-06cpu/intel/haswell: convert to using common MP and SMM initAaron Durbin
2016-05-04cpu/x86: combine multiprocessor and SMM initializationAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-04cpu/x86/smm_module_loader: always build with SMM module supportAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-28soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov
2016-04-11cpu/x86/tsc: Compile TSC timer for postcar as wellAndrey Petrov
2016-04-11cpu/x86/tsc: remove conditional compilationAaron Durbin
2016-04-11cpu/x86/tsc: compile same code for all stagesAaron Durbin
2016-04-11cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.cAaron Durbin
2016-04-11src/cpu/x86: remove TSC_CALIBRATE_WITH_IOAaron Durbin
2016-04-10am335x: Add some code for manipulating GPIOsGabe Black
2016-04-10am335x: Add data structures for the clock module registersGabe Black
2016-03-31src/: Fix lint style-labels warningsMartin Roth
2016-03-23arch/x86: introduce postcar stage/phaseAaron Durbin
2016-03-18mtrr: Define a function for obtaining free var mtrrFurquan Shaikh
2016-03-16cpu/x86: compile earlymtrr.c code for romstage as wellAndrey Petrov
2016-03-16cpu/x86/mtrr: remove early_mtrr_* functionsAaron Durbin
2016-03-16cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin
2016-03-10cpu/via/c7: Don't manually include udelay_io.cStefan Reinauer
2016-03-10northbridge/intel/i440bx: Unify UDELAY selectionStefan Reinauer
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-03-08Kconfig: Remove unneeded UDELAY_IO redeclarationStefan Reinauer
2016-03-08cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin
2016-03-08cpu/x86: Sort some Kconfig optionsStefan Reinauer
2016-03-05arch/x86: document CAR symbols and expose them in symbols.hAndrey Petrov
2016-03-04arch/x86: always use _start as entry symbol for all stagesAaron Durbin
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