summaryrefslogtreecommitdiff
path: root/src/cpu
AgeCommit message (Expand)Author
2018-08-13cpu/intel/car: Align the stack to 16 bytes before romstage_mainArthur Heymans
2018-08-13cpu/x86/smm/smm_module_loader.c: Avoid static analysis error "unused value"Richard Spiegel
2018-08-09cpu/x86/mp_init.c: Avoid static analysis error for unused valueRichard Spiegel
2018-08-09src/cpu: Fix typoElyes HAOUAS
2018-08-09cpu/x86/mp_init.c: Fix error treatmentRichard Spiegel
2018-08-09cpu/intel/smm: Make sure SMRR base is aligned to SMRR sizeArthur Heymans
2018-08-08cpu/amd: Correct number of MCA banks clearedMarshall Dawson
2018-08-08cpu/amd: Improve formattingMarshall Dawson
2018-08-08cpu/amd: Rename MCA status registerMarshall Dawson
2018-08-06mp_init: fix typoRaul E Rangel
2018-08-03cpu/x86/lapic/apic_timer.c: Compile the same code for all stagesArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-30cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067xArthur Heymans
2018-07-30cpu/intel/microcode: Add helper functions to get microcode infoRizwan Qureshi
2018-07-28nb/intel/sandybridge: Move CPU report to cpu folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-07-24cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans
2018-07-09src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-28smm: Add canary to end of stack and die() if a stack overflow occursRaul E Rangel
2018-06-27smm: Switch from %edx to %ebxRaul E Rangel
2018-06-27smm: Push a null stack base pointerRaul E Rangel
2018-06-27smm: Make local variables relative to ebpRaul E Rangel
2018-06-27smm: Clear SMRAM when debuggingRaul E Rangel
2018-06-27cpu/intel/p4-netburst: skip caching rom on model_fxxArthur Heymans
2018-06-27x86/car: Replace reference of copy_and_run locationKyösti Mälkki
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-06-17nb/intel/i440bx: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-17cpu/intel/car/p3: Use variable MTRR countKyösti Mälkki
2018-06-17cpu/intel/slot_1: Switch to different CAR setupKyösti Mälkki
2018-06-17cpu/intel/car: Remove obsolete filesKyösti Mälkki
2018-06-14cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans
2018-06-14cpu/amd: Remove duplicated includesElyes HAOUAS
2018-06-14cpu/x86: Make SMM stack size configurableRaul E Rangel
2018-06-06arch/x86: Always select RELOCATABLE_MODULESKyösti Mälkki
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-06arch/x86: Drop leftover ROMCC supportKyösti Mälkki
2018-06-06cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded includeElyes HAOUAS
2018-06-05amd/geode_lx: Fix .c includesKyösti Mälkki
2018-06-05cpu/intel/haswell: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_2065x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/non-evict: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-05nb/intel/gm45: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/x4x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/pineview: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/i945: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/core2: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/core2: Prepare for POSTCAR_STAGE supportArthur Heymans
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-06-04amdfam10: Drop tests for LATE_CBMEM_INITKyösti Mälkki
2018-06-04src/cpu: Get rid of whitespace before tabElyes HAOUAS
2018-06-04cpu/x86/mp: Update CPU name in device structureNaresh G Solanki
2018-06-02intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-02cpu/intel/car: Prepare for some POSTCAR_STAGE supportKyösti Mälkki
2018-06-02aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INITKyösti Mälkki
2018-06-01src/cpu: Remove unneeded includesElyes HAOUAS
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2018-05-31Remove VIA C7 CPU supportKyösti Mälkki
2018-05-31Remove VIA C3 CPU supportKyösti Mälkki
2018-05-31Remove AMD K8 cpu and northbridge supportKyösti Mälkki
2018-05-24Remove leftover Intel CPU supportKyösti Mälkki
2018-05-19cpu/x86: Add support to run function on single APSubrata Banik
2018-05-14cpu/x86: Add support to run function with argument over APsSubrata Banik
2018-05-14cpu/x86/mp: pass pointers to structures for AP callbacksAaron Durbin
2018-05-09cpu/amd/quadcore: Get rid of device_tElyes HAOUAS
2018-05-04cpu/x86/mp: use __aligned macroAaron Durbin
2018-05-04cpu/x86/mp: remove unused functions and limit API exposureAaron Durbin
2018-05-03cpu/x86: Add infinite timeout support into run_ap_work() functionSubrata Banik
2018-05-03arch/x86: Relocate GDT in verstage, romstage, and postcarHannah Williams
2018-05-01Fix freeze during chipset lockdown on NehalemMatthias Gazzari
2018-04-30cpu/intel: Get rid of device_tElyes HAOUAS
2018-04-30cpu/amd: Get rid of device_tElyes HAOUAS
2018-04-30cpu/x86: Get rid of device_tElyes HAOUAS
2018-04-30cubieboard/qemu-armv7/am335x: Add fake TTB region for consistencyJulius Werner
2018-04-29amd/agesa/family14,15 & 16: Remove unnecessary whitespaceElyes HAOUAS
2018-04-28arch/x86: Fix call for wait_other_cpus_stop()Kyösti Mälkki
2018-04-26cpu/x86: add limited runtime identity page mappingAaron Durbin
2018-04-25arch/x86: add support for cache-as-ram pagingAaron Durbin
2018-04-25cpu/via/car: drop CARTESTLubomir Rintel
2018-04-25cpu/via/car: ensure CAR ends up zeroed outLubomir Rintel
2018-04-24compiler.h: add __weak macroAaron Durbin
2018-04-23cpu/x86: add paging_set_default_pat() functionAaron Durbin
2018-04-23cpu/x86: expose and add paging helper functionsAaron Durbin
2018-04-23cpu/x86: move NXE and PAT accesses to paging moduleAaron Durbin
2018-04-23cpu/x86: add pae paging module to all stagesAaron Durbin
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2018-04-11Correct "MTTR" to "MTRR"Jonathan Neuschäfer
2018-04-11cpu/x86/mtrr: Fix broken output ("indexis")Jonathan Neuschäfer
2018-04-10cpu/amd/microcode/microcode.c: Remove unneeded whitespaceElyes HAOUAS
2018-04-10cpu/intel/sandybridge: Put stage cache into TSEGArthur Heymans
2018-04-09cpu/x86/mtrr: Use single code path with/without holesNico Huber
2018-04-09cpu/x86/mtrr: Optimize hole carving strategyNico Huber
2018-04-09intel/nehalem post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2018-04-01x86: Increase time out for parking APs to 250msFurquan Shaikh
2018-03-09cpu/x86/mp_init: Print amount of time it takes in bsp_do_flight_planFurquan Shaikh
2018-03-05cpu/x86/mp_init: Increase AP check-in time-out to 1secondFurquan Shaikh
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 09:15:23 +0000